IEICE TRANSACTIONS on Electronics
Low-Complexity Sign Detection Algorithm for RNS {2n-1, 2n, 2n+1}
Summary :
Based on a reverse converter algorithm derived from the New Chinese Remainder Theorem I, an algorithm for sign detection of RNS {2n-1, 2n, 2n+1} is presented in this paper. The hardware of proposed algorithm can be implemented using two n-bit additions and one (n+1)-bit comparator. Comparing with the previous paper, the proposed algorithm has reduced the number of additions used in the circuit. The experimental results show that the proposed circuit achieves 17.3% savings in area for small moduli and 10.5% savings in area for large moduli on an average, with almost the same speed. The power dissipations obtain 12.6% savings in average.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E95-C No.9 pp.1552-1556
- Publication Date
- 2012/09/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E95.C.1552
- Type of Manuscript
- BRIEF PAPER
- Category
- Electronic Circuits
Authors
Keyword
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Minghe XU, Ruohe YAO, Fei LUO, "Low-Complexity Sign Detection Algorithm for RNS {2n-1, 2n, 2n+1}" in IEICE TRANSACTIONS on Electronics,
vol. E95-C, no. 9, pp. 1552-1556, September 2012, doi: 10.1587/transele.E95.C.1552.
Abstract: Based on a reverse converter algorithm derived from the New Chinese Remainder Theorem I, an algorithm for sign detection of RNS {2n-1, 2n, 2n+1} is presented in this paper. The hardware of proposed algorithm can be implemented using two n-bit additions and one (n+1)-bit comparator. Comparing with the previous paper, the proposed algorithm has reduced the number of additions used in the circuit. The experimental results show that the proposed circuit achieves 17.3% savings in area for small moduli and 10.5% savings in area for large moduli on an average, with almost the same speed. The power dissipations obtain 12.6% savings in average.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E95.C.1552/_p
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@ARTICLE{e95-c_9_1552,
author={Minghe XU, Ruohe YAO, Fei LUO, },
journal={IEICE TRANSACTIONS on Electronics},
title={Low-Complexity Sign Detection Algorithm for RNS {2n-1, 2n, 2n+1}},
year={2012},
volume={E95-C},
number={9},
pages={1552-1556},
abstract={Based on a reverse converter algorithm derived from the New Chinese Remainder Theorem I, an algorithm for sign detection of RNS {2n-1, 2n, 2n+1} is presented in this paper. The hardware of proposed algorithm can be implemented using two n-bit additions and one (n+1)-bit comparator. Comparing with the previous paper, the proposed algorithm has reduced the number of additions used in the circuit. The experimental results show that the proposed circuit achieves 17.3% savings in area for small moduli and 10.5% savings in area for large moduli on an average, with almost the same speed. The power dissipations obtain 12.6% savings in average.},
keywords={},
doi={10.1587/transele.E95.C.1552},
ISSN={1745-1353},
month={September},}
Copy
TY - JOUR
TI - Low-Complexity Sign Detection Algorithm for RNS {2n-1, 2n, 2n+1}
T2 - IEICE TRANSACTIONS on Electronics
SP - 1552
EP - 1556
AU - Minghe XU
AU - Ruohe YAO
AU - Fei LUO
PY - 2012
DO - 10.1587/transele.E95.C.1552
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E95-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 2012
AB - Based on a reverse converter algorithm derived from the New Chinese Remainder Theorem I, an algorithm for sign detection of RNS {2n-1, 2n, 2n+1} is presented in this paper. The hardware of proposed algorithm can be implemented using two n-bit additions and one (n+1)-bit comparator. Comparing with the previous paper, the proposed algorithm has reduced the number of additions used in the circuit. The experimental results show that the proposed circuit achieves 17.3% savings in area for small moduli and 10.5% savings in area for large moduli on an average, with almost the same speed. The power dissipations obtain 12.6% savings in average.
ER -
English
