3-D Range Map Acquisition System Based on CMOS Image Sensor Using Time-Multiplexing Structured Pattern
Summary :
We present a 3-D range map acquisition system using a gray-encoded time-multiplexing structured pattern. In this method the only information needed to reconstruct 3-D range map is whether the pixel is bright or not for the exposed structured patterns. A dedicated image sensor to capture the pattern consists of pixel parallel 1-bit A/D converter, in-pixel pattern address memory and column parallel digital pattern address readout circuit. This in-pixel memory and digital bit-parallel pattern address readout eliminate unnecessary readout of pattern data to enhance 3-D acquisition speed. We fabricated the image sensor in 0.18 µm CMOS and demonstrated up to 122 range map per second 3-D range map acquisition performance for 7 patterns with the average error of 3.2 mm under the condition of 10% pattern recognition error.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E95-C No.4 pp.635-642
- Publication Date
- 2012/04/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E95.C.635
- Type of Manuscript
- Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
- Category
Authors
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Hiroki YABE, Makoto IKEDA, "3-D Range Map Acquisition System Based on CMOS Image Sensor Using Time-Multiplexing Structured Pattern" in IEICE TRANSACTIONS on Electronics,
vol. E95-C, no. 4, pp. 635-642, April 2012, doi: 10.1587/transele.E95.C.635.
Abstract: We present a 3-D range map acquisition system using a gray-encoded time-multiplexing structured pattern. In this method the only information needed to reconstruct 3-D range map is whether the pixel is bright or not for the exposed structured patterns. A dedicated image sensor to capture the pattern consists of pixel parallel 1-bit A/D converter, in-pixel pattern address memory and column parallel digital pattern address readout circuit. This in-pixel memory and digital bit-parallel pattern address readout eliminate unnecessary readout of pattern data to enhance 3-D acquisition speed. We fabricated the image sensor in 0.18 µm CMOS and demonstrated up to 122 range map per second 3-D range map acquisition performance for 7 patterns with the average error of 3.2 mm under the condition of 10% pattern recognition error.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E95.C.635/_p
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@ARTICLE{e95-c_4_635,
author={Hiroki YABE, Makoto IKEDA, },
journal={IEICE TRANSACTIONS on Electronics},
title={3-D Range Map Acquisition System Based on CMOS Image Sensor Using Time-Multiplexing Structured Pattern},
year={2012},
volume={E95-C},
number={4},
pages={635-642},
abstract={We present a 3-D range map acquisition system using a gray-encoded time-multiplexing structured pattern. In this method the only information needed to reconstruct 3-D range map is whether the pixel is bright or not for the exposed structured patterns. A dedicated image sensor to capture the pattern consists of pixel parallel 1-bit A/D converter, in-pixel pattern address memory and column parallel digital pattern address readout circuit. This in-pixel memory and digital bit-parallel pattern address readout eliminate unnecessary readout of pattern data to enhance 3-D acquisition speed. We fabricated the image sensor in 0.18 µm CMOS and demonstrated up to 122 range map per second 3-D range map acquisition performance for 7 patterns with the average error of 3.2 mm under the condition of 10% pattern recognition error.},
keywords={},
doi={10.1587/transele.E95.C.635},
ISSN={1745-1353},
month={April},}
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TY - JOUR
TI - 3-D Range Map Acquisition System Based on CMOS Image Sensor Using Time-Multiplexing Structured Pattern
T2 - IEICE TRANSACTIONS on Electronics
SP - 635
EP - 642
AU - Hiroki YABE
AU - Makoto IKEDA
PY - 2012
DO - 10.1587/transele.E95.C.635
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E95-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2012
AB - We present a 3-D range map acquisition system using a gray-encoded time-multiplexing structured pattern. In this method the only information needed to reconstruct 3-D range map is whether the pixel is bright or not for the exposed structured patterns. A dedicated image sensor to capture the pattern consists of pixel parallel 1-bit A/D converter, in-pixel pattern address memory and column parallel digital pattern address readout circuit. This in-pixel memory and digital bit-parallel pattern address readout eliminate unnecessary readout of pattern data to enhance 3-D acquisition speed. We fabricated the image sensor in 0.18 µm CMOS and demonstrated up to 122 range map per second 3-D range map acquisition performance for 7 patterns with the average error of 3.2 mm under the condition of 10% pattern recognition error.
ER -
English
