IEICE TRANSACTIONS on Electronics
Design of a Direct Sampling Mixer with a Complex Coefficient Transfer Function
Summary :
The Direct Sampling Mixer (DSM) with a complex coefficient transfer function is demonstrated. The operation theory and the detail design methodology are discussed for the high order complex DSM, which can achieve large image rejection ratio by introducing the attenuation pole at the image frequency band. The proposed architecture was fabricated in a 65 nm CMOS process. The measured results agree well with the theoretical calculation, which proves the validity of the proposed architecture and the design methodology. By using the proposed design method, it will be possible for circuit designers to design the DSM with large image rejection ratio without repeated lengthy simulations.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E95-C No.6 pp.999-1007
- Publication Date
- 2012/06/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E95.C.999
- Type of Manuscript
- Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
- Category
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Yohei MORISHITA, Noriaki SAITO, Koji TAKINAMI, Kiyomichi ARAKI, "Design of a Direct Sampling Mixer with a Complex Coefficient Transfer Function" in IEICE TRANSACTIONS on Electronics,
vol. E95-C, no. 6, pp. 999-1007, June 2012, doi: 10.1587/transele.E95.C.999.
Abstract: The Direct Sampling Mixer (DSM) with a complex coefficient transfer function is demonstrated. The operation theory and the detail design methodology are discussed for the high order complex DSM, which can achieve large image rejection ratio by introducing the attenuation pole at the image frequency band. The proposed architecture was fabricated in a 65 nm CMOS process. The measured results agree well with the theoretical calculation, which proves the validity of the proposed architecture and the design methodology. By using the proposed design method, it will be possible for circuit designers to design the DSM with large image rejection ratio without repeated lengthy simulations.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E95.C.999/_p
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@ARTICLE{e95-c_6_999,
author={Yohei MORISHITA, Noriaki SAITO, Koji TAKINAMI, Kiyomichi ARAKI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Design of a Direct Sampling Mixer with a Complex Coefficient Transfer Function},
year={2012},
volume={E95-C},
number={6},
pages={999-1007},
abstract={The Direct Sampling Mixer (DSM) with a complex coefficient transfer function is demonstrated. The operation theory and the detail design methodology are discussed for the high order complex DSM, which can achieve large image rejection ratio by introducing the attenuation pole at the image frequency band. The proposed architecture was fabricated in a 65 nm CMOS process. The measured results agree well with the theoretical calculation, which proves the validity of the proposed architecture and the design methodology. By using the proposed design method, it will be possible for circuit designers to design the DSM with large image rejection ratio without repeated lengthy simulations.},
keywords={},
doi={10.1587/transele.E95.C.999},
ISSN={1745-1353},
month={June},}
Copy
TY - JOUR
TI - Design of a Direct Sampling Mixer with a Complex Coefficient Transfer Function
T2 - IEICE TRANSACTIONS on Electronics
SP - 999
EP - 1007
AU - Yohei MORISHITA
AU - Noriaki SAITO
AU - Koji TAKINAMI
AU - Kiyomichi ARAKI
PY - 2012
DO - 10.1587/transele.E95.C.999
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E95-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2012
AB - The Direct Sampling Mixer (DSM) with a complex coefficient transfer function is demonstrated. The operation theory and the detail design methodology are discussed for the high order complex DSM, which can achieve large image rejection ratio by introducing the attenuation pole at the image frequency band. The proposed architecture was fabricated in a 65 nm CMOS process. The measured results agree well with the theoretical calculation, which proves the validity of the proposed architecture and the design methodology. By using the proposed design method, it will be possible for circuit designers to design the DSM with large image rejection ratio without repeated lengthy simulations.
ER -
English
