Ternary content addressable memory (TCAM) is popular LSI for use in high-throughput forwarding engines on routers. However, the unique structure applied in TCAM consume huge amounts of power, therefore it restricts the ability to handle large lookup table capacity in IP routers. In this paper, we propose a commodity-memory based hardware architecture for the forwarding information base (FIB) application that solves the substantial problems of power and density. The proposed architecture is examined by a fabricated test chip with 40 nm embedded DRAM (eDRAM) technology, and the effect of power reduction verified is greatly lower than conventional TCAM based and the energy metric achieve 0.01 fJ/bit/search. The power consumption is almost 0.5 W at 250 Msps and 8M entries.
Hisashi IWAMOTO
Renesas Electronics
Yuji YANO
Renesas Electronics
Yasuto KURODA
Renesas Electronics
Koji YAMAMOTO
Renesas Design
Kazunari INOUE
Osaka University
Ikuo OKA
Osaka City University
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Hisashi IWAMOTO, Yuji YANO, Yasuto KURODA, Koji YAMAMOTO, Kazunari INOUE, Ikuo OKA, "A 250 Msps, 0.5 W eDRAM-Based Search Engine Dedicated Low Power FIB Application" in IEICE TRANSACTIONS on Electronics,
vol. E96-C, no. 8, pp. 1076-1082, August 2013, doi: 10.1587/transele.E96.C.1076.
Abstract: Ternary content addressable memory (TCAM) is popular LSI for use in high-throughput forwarding engines on routers. However, the unique structure applied in TCAM consume huge amounts of power, therefore it restricts the ability to handle large lookup table capacity in IP routers. In this paper, we propose a commodity-memory based hardware architecture for the forwarding information base (FIB) application that solves the substantial problems of power and density. The proposed architecture is examined by a fabricated test chip with 40 nm embedded DRAM (eDRAM) technology, and the effect of power reduction verified is greatly lower than conventional TCAM based and the energy metric achieve 0.01 fJ/bit/search. The power consumption is almost 0.5 W at 250 Msps and 8M entries.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E96.C.1076/_p
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@ARTICLE{e96-c_8_1076,
author={Hisashi IWAMOTO, Yuji YANO, Yasuto KURODA, Koji YAMAMOTO, Kazunari INOUE, Ikuo OKA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 250 Msps, 0.5 W eDRAM-Based Search Engine Dedicated Low Power FIB Application},
year={2013},
volume={E96-C},
number={8},
pages={1076-1082},
abstract={Ternary content addressable memory (TCAM) is popular LSI for use in high-throughput forwarding engines on routers. However, the unique structure applied in TCAM consume huge amounts of power, therefore it restricts the ability to handle large lookup table capacity in IP routers. In this paper, we propose a commodity-memory based hardware architecture for the forwarding information base (FIB) application that solves the substantial problems of power and density. The proposed architecture is examined by a fabricated test chip with 40 nm embedded DRAM (eDRAM) technology, and the effect of power reduction verified is greatly lower than conventional TCAM based and the energy metric achieve 0.01 fJ/bit/search. The power consumption is almost 0.5 W at 250 Msps and 8M entries.},
keywords={},
doi={10.1587/transele.E96.C.1076},
ISSN={1745-1353},
month={August},}
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TY - JOUR
TI - A 250 Msps, 0.5 W eDRAM-Based Search Engine Dedicated Low Power FIB Application
T2 - IEICE TRANSACTIONS on Electronics
SP - 1076
EP - 1082
AU - Hisashi IWAMOTO
AU - Yuji YANO
AU - Yasuto KURODA
AU - Koji YAMAMOTO
AU - Kazunari INOUE
AU - Ikuo OKA
PY - 2013
DO - 10.1587/transele.E96.C.1076
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E96-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 2013
AB - Ternary content addressable memory (TCAM) is popular LSI for use in high-throughput forwarding engines on routers. However, the unique structure applied in TCAM consume huge amounts of power, therefore it restricts the ability to handle large lookup table capacity in IP routers. In this paper, we propose a commodity-memory based hardware architecture for the forwarding information base (FIB) application that solves the substantial problems of power and density. The proposed architecture is examined by a fabricated test chip with 40 nm embedded DRAM (eDRAM) technology, and the effect of power reduction verified is greatly lower than conventional TCAM based and the energy metric achieve 0.01 fJ/bit/search. The power consumption is almost 0.5 W at 250 Msps and 8M entries.
ER -