BTB Energy Reduction by Focusing on Useless Accesses

Yoshio SHIMOMURA; Hiroki YAMAMOTO; Hayato USUI; Ryotaro KOBAYASHI; Hajime SHIMADA

doi:10.1587/transele.E98.C.569

BTB Energy Reduction by Focusing on Useless Accesses

Yoshio SHIMOMURA, Hiroki YAMAMOTO, Hayato USUI, Ryotaro KOBAYASHI, Hajime SHIMADA

Full Text Views

0

Cite this

Summary :

Modern processors use Branch Target Buffer (BTB)[1] to relax control dependence. Unfortunately, the energy consumption of the BTB is high. In order to effectively fetch instructions, it is necessary to perform a branch prediction at the fetch stage, regardless of whether the fetched instruction is a branch or a nonbranch. Therefore, the number of accesses to the BTB is large, and the energy consumption of the BTB is high. However, accesses from nonbranches to the BTB waste energy. In this paper, we focus on accesses from nonbranches to the BTB, which we call useless accesses from a viewpoint of power. For reducing energy consumption without performance loss, we present a method that reduces useless accesses by using information that indicates whether a fetched instruction is a branch or not. To realize the above approach, we propose a branch bit called B-Bit. A B-Bit is associated with an instruction and indicates whether it is a branch or not. A B-Bit is available at the beginning of the fetch stage. If a B-Bit is “1” signifying a branch, the BTB is accessed. If a B-Bit is “0” signifying a nonbranch, the BTB is not accessed. The experimental results show that the total energy consumption can be reduced by 54.3% without performance loss.

Publication: IEICE TRANSACTIONS on Electronics Vol.E98-C No.7 pp.569-579

Publication Date: 2015/07/01

Publicized

Online ISSN: 1745-1353

DOI: 10.1587/transele.E98.C.569

Type of Manuscript: Special Section PAPER (Special Section on Low-Power and High-Speed Chips)

Category

Authors

Yoshio SHIMOMURA
  MNU Co., Ltd.
Hiroki YAMAMOTO
  Toyohashi University of Technology
Hayato USUI
  DENSO CREATE INC.
Ryotaro KOBAYASHI
  Toyohashi University of Technology
Hajime SHIMADA
  Nagoya University

Keyword

Branch Target Buffer, branch prediction, energy reduction

Cite this

Copy

Yoshio SHIMOMURA, Hiroki YAMAMOTO, Hayato USUI, Ryotaro KOBAYASHI, Hajime SHIMADA, "BTB Energy Reduction by Focusing on Useless Accesses" in IEICE TRANSACTIONS on Electronics, vol. E98-C, no. 7, pp. 569-579, July 2015, doi: 10.1587/transele.E98.C.569.
Abstract: Modern processors use Branch Target Buffer (BTB)[1] to relax control dependence. Unfortunately, the energy consumption of the BTB is high. In order to effectively fetch instructions, it is necessary to perform a branch prediction at the fetch stage, regardless of whether the fetched instruction is a branch or a nonbranch. Therefore, the number of accesses to the BTB is large, and the energy consumption of the BTB is high. However, accesses from nonbranches to the BTB waste energy. In this paper, we focus on accesses from nonbranches to the BTB, which we call useless accesses from a viewpoint of power. For reducing energy consumption without performance loss, we present a method that reduces useless accesses by using information that indicates whether a fetched instruction is a branch or not. To realize the above approach, we propose a branch bit called B-Bit. A B-Bit is associated with an instruction and indicates whether it is a branch or not. A B-Bit is available at the beginning of the fetch stage. If a B-Bit is “1” signifying a branch, the BTB is accessed. If a B-Bit is “0” signifying a nonbranch, the BTB is not accessed. The experimental results show that the total energy consumption can be reduced by 54.3% without performance loss.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E98.C.569/_p

Copy

@ARTICLE{e98-c_7_569,
author={Yoshio SHIMOMURA, Hiroki YAMAMOTO, Hayato USUI, Ryotaro KOBAYASHI, Hajime SHIMADA, },
journal={IEICE TRANSACTIONS on Electronics},
title={BTB Energy Reduction by Focusing on Useless Accesses},
year={2015},
volume={E98-C},
number={7},
pages={569-579},
abstract={Modern processors use Branch Target Buffer (BTB)[1] to relax control dependence. Unfortunately, the energy consumption of the BTB is high. In order to effectively fetch instructions, it is necessary to perform a branch prediction at the fetch stage, regardless of whether the fetched instruction is a branch or a nonbranch. Therefore, the number of accesses to the BTB is large, and the energy consumption of the BTB is high. However, accesses from nonbranches to the BTB waste energy. In this paper, we focus on accesses from nonbranches to the BTB, which we call useless accesses from a viewpoint of power. For reducing energy consumption without performance loss, we present a method that reduces useless accesses by using information that indicates whether a fetched instruction is a branch or not. To realize the above approach, we propose a branch bit called B-Bit. A B-Bit is associated with an instruction and indicates whether it is a branch or not. A B-Bit is available at the beginning of the fetch stage. If a B-Bit is “1” signifying a branch, the BTB is accessed. If a B-Bit is “0” signifying a nonbranch, the BTB is not accessed. The experimental results show that the total energy consumption can be reduced by 54.3% without performance loss.},
keywords={},
doi={10.1587/transele.E98.C.569},
ISSN={1745-1353},
month={July},}

Copy

TY - JOUR
TI - BTB Energy Reduction by Focusing on Useless Accesses
T2 - IEICE TRANSACTIONS on Electronics
SP - 569
EP - 579
AU - Yoshio SHIMOMURA
AU - Hiroki YAMAMOTO
AU - Hayato USUI
AU - Ryotaro KOBAYASHI
AU - Hajime SHIMADA
PY - 2015
DO - 10.1587/transele.E98.C.569
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E98-C
IS - 7
JA - IEICE TRANSACTIONS on Electronics
Y1 - July 2015
AB - Modern processors use Branch Target Buffer (BTB)[1] to relax control dependence. Unfortunately, the energy consumption of the BTB is high. In order to effectively fetch instructions, it is necessary to perform a branch prediction at the fetch stage, regardless of whether the fetched instruction is a branch or a nonbranch. Therefore, the number of accesses to the BTB is large, and the energy consumption of the BTB is high. However, accesses from nonbranches to the BTB waste energy. In this paper, we focus on accesses from nonbranches to the BTB, which we call useless accesses from a viewpoint of power. For reducing energy consumption without performance loss, we present a method that reduces useless accesses by using information that indicates whether a fetched instruction is a branch or not. To realize the above approach, we propose a branch bit called B-Bit. A B-Bit is associated with an instruction and indicates whether it is a branch or not. A B-Bit is available at the beginning of the fetch stage. If a B-Bit is “1” signifying a branch, the BTB is accessed. If a B-Bit is “0” signifying a nonbranch, the BTB is not accessed. The experimental results show that the total energy consumption can be reduced by 54.3% without performance loss.
ER -