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IEICE TRANSACTIONS on Electronics

Multi-Voltage Variable Pipeline Routers with the Same Clock Frequency for Low-Power Network-on-Chips Systems

Akram BEN AHMED, Hiroki MATSUTANI, Michihiro KOIBUCHI, Kimiyoshi USAMI, Hideharu AMANO

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Summary :

In this paper, the Multi-voltage (multi-Vdd) variable pipeline router is proposed to reduce the power consumption of Network-on-Chips (NoCs) designed for Chip Multi-processors (CMPs). The multi-Vdd variable pipeline router adjusts its pipeline depth (i.e., communication latency) and supply voltage level in response to the applied workload. Unlike Dynamic Voltage and Frequency Scaling (DVFS) routers, the operating frequency remains the same for all routers throughout the CMP; thus, omitting the need to synchronize neighboring routers working at different frequencies. Two types of router architectures are presented: a Coarse-Grained Variable Pipeline (CG-VP) router that changes the voltage supplied to the entire router, and a Fine-Grained Variable Pipeline (FG-VP) router that uses a finer power partition. The evaluation results showed that the CG-VP and FG-VP routers achieve a 22.9% and 35.3% power reduction on average with 14% and 23% area overhead in comparison with a baseline router without variable pipelines, respectively. Thanks to the adopted look-ahead mechanism to switch the supply voltage, the performance overhead is only 4.4%.

Publication
IEICE TRANSACTIONS on Electronics Vol.E99-C No.8 pp.909-917
Publication Date
2016/08/01
Publicized
Online ISSN
1745-1353
DOI
10.1587/transele.E99.C.909
Type of Manuscript
Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category

Authors

Akram BEN AHMED
  Keio University
Hiroki MATSUTANI
  Keio University
Michihiro KOIBUCHI
  National Institute of Informatics
Kimiyoshi USAMI
  Shibaura Institute of Technology
Hideharu AMANO
  Keio University

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