IEICE TRANSACTIONS on Fundamentals
Timing-Driven Placement Based on Path Topology Analysis
Summary :
A timing-driven placement algorithm based on path topology analysis is presented. The optimization for path delay is transformed into cell location optimization. The algorithm pays much attention on path topologies and applies an effective force directed method to find cell target locations. Total wire length optimization is combined with the timing-driven placement algorithm. MCNC (Microelectronics Centre of North-Carolina) standard cell benchmarks are experimented and results show that our timing-driven placement algorithm can make the longest path delay improve up to 13% compared with wirelength driven placement.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E88-A No.8 pp.2227-2230
- Publication Date
- 2005/08/01
- Publicized
- Online ISSN
- DOI
- 10.1093/ietfec/e88-a.8.2227
- Type of Manuscript
- LETTER
- Category
- VLSI Design Technology and CAD
Authors
Keyword
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Feng CHENG, Junfa MAO, Xiaochun LI, "Timing-Driven Placement Based on Path Topology Analysis" in IEICE TRANSACTIONS on Fundamentals,
vol. E88-A, no. 8, pp. 2227-2230, August 2005, doi: 10.1093/ietfec/e88-a.8.2227.
Abstract: A timing-driven placement algorithm based on path topology analysis is presented. The optimization for path delay is transformed into cell location optimization. The algorithm pays much attention on path topologies and applies an effective force directed method to find cell target locations. Total wire length optimization is combined with the timing-driven placement algorithm. MCNC (Microelectronics Centre of North-Carolina) standard cell benchmarks are experimented and results show that our timing-driven placement algorithm can make the longest path delay improve up to 13% compared with wirelength driven placement.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e88-a.8.2227/_p
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@ARTICLE{e88-a_8_2227,
author={Feng CHENG, Junfa MAO, Xiaochun LI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Timing-Driven Placement Based on Path Topology Analysis},
year={2005},
volume={E88-A},
number={8},
pages={2227-2230},
abstract={A timing-driven placement algorithm based on path topology analysis is presented. The optimization for path delay is transformed into cell location optimization. The algorithm pays much attention on path topologies and applies an effective force directed method to find cell target locations. Total wire length optimization is combined with the timing-driven placement algorithm. MCNC (Microelectronics Centre of North-Carolina) standard cell benchmarks are experimented and results show that our timing-driven placement algorithm can make the longest path delay improve up to 13% compared with wirelength driven placement.},
keywords={},
doi={10.1093/ietfec/e88-a.8.2227},
ISSN={},
month={August},}
Copy
TY - JOUR
TI - Timing-Driven Placement Based on Path Topology Analysis
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2227
EP - 2230
AU - Feng CHENG
AU - Junfa MAO
AU - Xiaochun LI
PY - 2005
DO - 10.1093/ietfec/e88-a.8.2227
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E88-A
IS - 8
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - August 2005
AB - A timing-driven placement algorithm based on path topology analysis is presented. The optimization for path delay is transformed into cell location optimization. The algorithm pays much attention on path topologies and applies an effective force directed method to find cell target locations. Total wire length optimization is combined with the timing-driven placement algorithm. MCNC (Microelectronics Centre of North-Carolina) standard cell benchmarks are experimented and results show that our timing-driven placement algorithm can make the longest path delay improve up to 13% compared with wirelength driven placement.
ER -
English
