IEICE TRANSACTIONS on Fundamentals
A Performance Model for the Design of Pipelined ADCs with Consideration of Overdrive Voltage and Slewing
Summary :
This paper proposes a performance model for design of pipelined analog-to-digital converters (ADCs). This model includes the effect of overdrive voltage on the transistor, slewing of the operational amplifier, multi-bit structure of multiplying digital to analog converter (MDAC) and technology scaling. The conversion frequency of ADC is improved by choosing the optimum overdrive voltage of the transistor, an important consideration at smaller design rules. Moreover, multi-bit MDACs are faster than the single-bit MDACs when slewing occurs during the step response. The performance model of pipelined ADC shown in this paper is attractive for the optimization of the ADC's performances.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E91-A No.2 pp.469-475
- Publication Date
- 2008/02/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1093/ietfec/e91-a.2.469
- Type of Manuscript
- Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
- Category
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Masaya MIYAHARA, Akira MATSUZAWA, "A Performance Model for the Design of Pipelined ADCs with Consideration of Overdrive Voltage and Slewing" in IEICE TRANSACTIONS on Fundamentals,
vol. E91-A, no. 2, pp. 469-475, February 2008, doi: 10.1093/ietfec/e91-a.2.469.
Abstract: This paper proposes a performance model for design of pipelined analog-to-digital converters (ADCs). This model includes the effect of overdrive voltage on the transistor, slewing of the operational amplifier, multi-bit structure of multiplying digital to analog converter (MDAC) and technology scaling. The conversion frequency of ADC is improved by choosing the optimum overdrive voltage of the transistor, an important consideration at smaller design rules. Moreover, multi-bit MDACs are faster than the single-bit MDACs when slewing occurs during the step response. The performance model of pipelined ADC shown in this paper is attractive for the optimization of the ADC's performances.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e91-a.2.469/_p
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@ARTICLE{e91-a_2_469,
author={Masaya MIYAHARA, Akira MATSUZAWA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Performance Model for the Design of Pipelined ADCs with Consideration of Overdrive Voltage and Slewing},
year={2008},
volume={E91-A},
number={2},
pages={469-475},
abstract={This paper proposes a performance model for design of pipelined analog-to-digital converters (ADCs). This model includes the effect of overdrive voltage on the transistor, slewing of the operational amplifier, multi-bit structure of multiplying digital to analog converter (MDAC) and technology scaling. The conversion frequency of ADC is improved by choosing the optimum overdrive voltage of the transistor, an important consideration at smaller design rules. Moreover, multi-bit MDACs are faster than the single-bit MDACs when slewing occurs during the step response. The performance model of pipelined ADC shown in this paper is attractive for the optimization of the ADC's performances.},
keywords={},
doi={10.1093/ietfec/e91-a.2.469},
ISSN={1745-1337},
month={February},}
Copy
TY - JOUR
TI - A Performance Model for the Design of Pipelined ADCs with Consideration of Overdrive Voltage and Slewing
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 469
EP - 475
AU - Masaya MIYAHARA
AU - Akira MATSUZAWA
PY - 2008
DO - 10.1093/ietfec/e91-a.2.469
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E91-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2008
AB - This paper proposes a performance model for design of pipelined analog-to-digital converters (ADCs). This model includes the effect of overdrive voltage on the transistor, slewing of the operational amplifier, multi-bit structure of multiplying digital to analog converter (MDAC) and technology scaling. The conversion frequency of ADC is improved by choosing the optimum overdrive voltage of the transistor, an important consideration at smaller design rules. Moreover, multi-bit MDACs are faster than the single-bit MDACs when slewing occurs during the step response. The performance model of pipelined ADC shown in this paper is attractive for the optimization of the ADC's performances.
ER -
English
