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A High-Speed Pipelined Degree-Computationless Modified Euclidean Algorithm Architecture for Reed-Solomon Decoders

Seungbeom LEE, Hanho LEE

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Summary :

This paper presents a novel high-speed low-complexity pipelined degree-computationless modified Euclidean (pDCME) algorithm architecture for high-speed RS decoders. The pDCME algorithm allows elimination of the degree-computation so as to reduce hardware complexity and obtain high-speed processing. A high-speed RS decoder based on the pDCME algorithm has been designed and implemented with 0.13-µm CMOS standard cell technology in a supply voltage of 1.1 V. The proposed RS decoder operates at a clock frequency of 660 MHz and has a throughput of 5.3 Gb/s. The proposed architecture requires approximately 15% fewer gate counts and a simpler control logic than architectures based on the popular modified Euclidean algorithm.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E91-A No.3 pp.830-835
Publication Date
2008/03/01
Publicized
Online ISSN
1745-1337
DOI
10.1093/ietfec/e91-a.3.830
Type of Manuscript
PAPER
Category
VLSI Design Technology and CAD

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