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An Efficient Heuristic Approach to State Encoding for PLA-Based Sequential Circuits

Kenji MINATO, Hiromu ARIYOSHI, Isao SHIRAKAWA

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Summary :

The present paper describes an efficient heuristic approach to state encoding of sequential circuits so that the total usage of silicon area of PLA-based two-level implementation for combinational circuits can be minimized. Apart from those conventional methods in which state encoding is determined one after another in a predetermined order of states, this approachi is distinctive in that top priority is given to how to seek cubes which constitute a cover to be allocated to each group of states (where a group of states denotes a set of states which have the same next state and the same output for an input) on the basis of a magnitude estimation of cubes so that the total number of cubes to be used can be minimized. Implementation results are also shown to reveal how this approach is of practical use.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E74-A No.1 pp.14-21
Publication Date
1991/01/25
Publicized
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Type of Manuscript
INVITED PAPER
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