A Hierarchical Multi-Layer Global Router
Summary :
We propose a hierarchical multi-layer global router for Sea-Of-Gates VLSI's, which is different from the conventional global routers, in that routing and layering are executed simultaneously. The main problems to be solved in the global routing for a multi-layer VLSI are which wire segments are laid out on upper layers and how they are connected to terminals located on lower layers. The main objective is to minimize the maximum of local congestions of all layers. We solve these problems in a hierarchical manner by routing from upper layers to lower layers.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E75-A No.10 pp.1294-1300
- Publication Date
- 1992/10/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
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Masayuki HAYASHI, Hiroyoshi YAMAZAKI, Shuji TSUKIYAMA, Nobuyuki NISHIGUCHI, "A Hierarchical Multi-Layer Global Router" in IEICE TRANSACTIONS on Fundamentals,
vol. E75-A, no. 10, pp. 1294-1300, October 1992, doi: .
Abstract: We propose a hierarchical multi-layer global router for Sea-Of-Gates VLSI's, which is different from the conventional global routers, in that routing and layering are executed simultaneously. The main problems to be solved in the global routing for a multi-layer VLSI are which wire segments are laid out on upper layers and how they are connected to terminals located on lower layers. The main objective is to minimize the maximum of local congestions of all layers. We solve these problems in a hierarchical manner by routing from upper layers to lower layers.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e75-a_10_1294/_p
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@ARTICLE{e75-a_10_1294,
author={Masayuki HAYASHI, Hiroyoshi YAMAZAKI, Shuji TSUKIYAMA, Nobuyuki NISHIGUCHI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Hierarchical Multi-Layer Global Router},
year={1992},
volume={E75-A},
number={10},
pages={1294-1300},
abstract={We propose a hierarchical multi-layer global router for Sea-Of-Gates VLSI's, which is different from the conventional global routers, in that routing and layering are executed simultaneously. The main problems to be solved in the global routing for a multi-layer VLSI are which wire segments are laid out on upper layers and how they are connected to terminals located on lower layers. The main objective is to minimize the maximum of local congestions of all layers. We solve these problems in a hierarchical manner by routing from upper layers to lower layers.},
keywords={},
doi={},
ISSN={},
month={October},}
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TY - JOUR
TI - A Hierarchical Multi-Layer Global Router
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1294
EP - 1300
AU - Masayuki HAYASHI
AU - Hiroyoshi YAMAZAKI
AU - Shuji TSUKIYAMA
AU - Nobuyuki NISHIGUCHI
PY - 1992
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E75-A
IS - 10
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - October 1992
AB - We propose a hierarchical multi-layer global router for Sea-Of-Gates VLSI's, which is different from the conventional global routers, in that routing and layering are executed simultaneously. The main problems to be solved in the global routing for a multi-layer VLSI are which wire segments are laid out on upper layers and how they are connected to terminals located on lower layers. The main objective is to minimize the maximum of local congestions of all layers. We solve these problems in a hierarchical manner by routing from upper layers to lower layers.
ER -
English
