Multiprocessor Implementation of 2-D Denominator-Separable Digital Filters Using Block Processing
Summary :
This paper treats the problem of realizing high speed 2-D denominator separable digital filters. Partitioning a 2-D data plane into square blocks, filtering proceeds block by block sequentially. A fast intra-block parallel processing method was developed using block state space realization, which allows simultaneous computation of all the next block states and the outputs of one block. As the block state matrix of the filter has high sparsity, the rows and columns are interchanged respectively to reduce the matrix size. The filter is implemented by a multiprocessor system, where for each matrix's row one processor is assigned to perform the row-column vector multiplication. All processors wirk in synchronized fashion. Number of processors of this implementation are equal to the number of rows of the reduced state matrix and throughput is raised with block lengths.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E75-A No.7 pp.846-851
- Publication Date
- 1992/07/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Section on Multidimensional Signal Processing)
- Category
- Design and Implementation of Multidimensional Digital Filters
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Tsuyosi TAKEBE, Masatoshi MURAKAMI, Koji HATANAKA, Shinya KOBAYASHI, "Multiprocessor Implementation of 2-D Denominator-Separable Digital Filters Using Block Processing" in IEICE TRANSACTIONS on Fundamentals,
vol. E75-A, no. 7, pp. 846-851, July 1992, doi: .
Abstract: This paper treats the problem of realizing high speed 2-D denominator separable digital filters. Partitioning a 2-D data plane into square blocks, filtering proceeds block by block sequentially. A fast intra-block parallel processing method was developed using block state space realization, which allows simultaneous computation of all the next block states and the outputs of one block. As the block state matrix of the filter has high sparsity, the rows and columns are interchanged respectively to reduce the matrix size. The filter is implemented by a multiprocessor system, where for each matrix's row one processor is assigned to perform the row-column vector multiplication. All processors wirk in synchronized fashion. Number of processors of this implementation are equal to the number of rows of the reduced state matrix and throughput is raised with block lengths.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e75-a_7_846/_p
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@ARTICLE{e75-a_7_846,
author={Tsuyosi TAKEBE, Masatoshi MURAKAMI, Koji HATANAKA, Shinya KOBAYASHI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Multiprocessor Implementation of 2-D Denominator-Separable Digital Filters Using Block Processing},
year={1992},
volume={E75-A},
number={7},
pages={846-851},
abstract={This paper treats the problem of realizing high speed 2-D denominator separable digital filters. Partitioning a 2-D data plane into square blocks, filtering proceeds block by block sequentially. A fast intra-block parallel processing method was developed using block state space realization, which allows simultaneous computation of all the next block states and the outputs of one block. As the block state matrix of the filter has high sparsity, the rows and columns are interchanged respectively to reduce the matrix size. The filter is implemented by a multiprocessor system, where for each matrix's row one processor is assigned to perform the row-column vector multiplication. All processors wirk in synchronized fashion. Number of processors of this implementation are equal to the number of rows of the reduced state matrix and throughput is raised with block lengths.},
keywords={},
doi={},
ISSN={},
month={July},}
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TY - JOUR
TI - Multiprocessor Implementation of 2-D Denominator-Separable Digital Filters Using Block Processing
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 846
EP - 851
AU - Tsuyosi TAKEBE
AU - Masatoshi MURAKAMI
AU - Koji HATANAKA
AU - Shinya KOBAYASHI
PY - 1992
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E75-A
IS - 7
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - July 1992
AB - This paper treats the problem of realizing high speed 2-D denominator separable digital filters. Partitioning a 2-D data plane into square blocks, filtering proceeds block by block sequentially. A fast intra-block parallel processing method was developed using block state space realization, which allows simultaneous computation of all the next block states and the outputs of one block. As the block state matrix of the filter has high sparsity, the rows and columns are interchanged respectively to reduce the matrix size. The filter is implemented by a multiprocessor system, where for each matrix's row one processor is assigned to perform the row-column vector multiplication. All processors wirk in synchronized fashion. Number of processors of this implementation are equal to the number of rows of the reduced state matrix and throughput is raised with block lengths.
ER -
English
