In this paper, we describe a worst-case design optimization approach for statistical design of integrated circuits with a circuit performance model scheme. After formulating worst-case optimization to an unconstrained multi-objective function minimization problem, a new objective function is proposed to find an optimal point. Then, based on an interpolation model scheme of approximating circuit performance, realistic worst-case analysis can be easily done by Monte Carlo based method without increasing much the computational load. The effectiveness of the presented approach is demonstrated by a standard test function and a practical circuit design example.
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Masayuki TAKAHASHI, Jin-Qin LU, Kimihiro OGAWA, Takehiko ADACHI, "A Worst-Case Optimization Approach with Circuit Performance Model Scheme" in IEICE TRANSACTIONS on Fundamentals,
vol. E78-A, no. 3, pp. 306-313, March 1995, doi: .
Abstract: In this paper, we describe a worst-case design optimization approach for statistical design of integrated circuits with a circuit performance model scheme. After formulating worst-case optimization to an unconstrained multi-objective function minimization problem, a new objective function is proposed to find an optimal point. Then, based on an interpolation model scheme of approximating circuit performance, realistic worst-case analysis can be easily done by Monte Carlo based method without increasing much the computational load. The effectiveness of the presented approach is demonstrated by a standard test function and a practical circuit design example.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e78-a_3_306/_p
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@ARTICLE{e78-a_3_306,
author={Masayuki TAKAHASHI, Jin-Qin LU, Kimihiro OGAWA, Takehiko ADACHI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Worst-Case Optimization Approach with Circuit Performance Model Scheme},
year={1995},
volume={E78-A},
number={3},
pages={306-313},
abstract={In this paper, we describe a worst-case design optimization approach for statistical design of integrated circuits with a circuit performance model scheme. After formulating worst-case optimization to an unconstrained multi-objective function minimization problem, a new objective function is proposed to find an optimal point. Then, based on an interpolation model scheme of approximating circuit performance, realistic worst-case analysis can be easily done by Monte Carlo based method without increasing much the computational load. The effectiveness of the presented approach is demonstrated by a standard test function and a practical circuit design example.},
keywords={},
doi={},
ISSN={},
month={March},}
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TY - JOUR
TI - A Worst-Case Optimization Approach with Circuit Performance Model Scheme
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 306
EP - 313
AU - Masayuki TAKAHASHI
AU - Jin-Qin LU
AU - Kimihiro OGAWA
AU - Takehiko ADACHI
PY - 1995
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E78-A
IS - 3
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - March 1995
AB - In this paper, we describe a worst-case design optimization approach for statistical design of integrated circuits with a circuit performance model scheme. After formulating worst-case optimization to an unconstrained multi-objective function minimization problem, a new objective function is proposed to find an optimal point. Then, based on an interpolation model scheme of approximating circuit performance, realistic worst-case analysis can be easily done by Monte Carlo based method without increasing much the computational load. The effectiveness of the presented approach is demonstrated by a standard test function and a practical circuit design example.
ER -