A Pipelined Data-Path Synthesis Method Based on Simulated Annealing
Summary :
The most creative tasks in synthesizing pipelined data paths executing software descriptions are determinations of latency and stage of pipeline, operation scheduling and hardware allocation. They are interrelated closely and depend on each other; thus finding its optimal solution has been a hard problem so far. By using simulated annealing methodology, these three tasks can be formulated as a three dimensional placement problem of operations in stage, time step and functional units space. This paper presents an efficient method based on simulated annealing to provide excellent solutions to the problem of not only the determinations of latency and stage of pipeline, operation scheduling and hardware allocation simultaneously, but also the pipelined data path synthesis under the constraints of performance or hardware cost. It is able to find a near optimal latency and stage of pipeline, an operation schedule and a hardware allocation in a reasonable time, while effectively exploring the existing tradeoffs in the design space.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E78-A No.8 pp.1017-1028
- Publication Date
- 1995/08/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Numerical Analysis and Optimization
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Xing-jian XU, Mitsuru ISHIZUKA, "A Pipelined Data-Path Synthesis Method Based on Simulated Annealing" in IEICE TRANSACTIONS on Fundamentals,
vol. E78-A, no. 8, pp. 1017-1028, August 1995, doi: .
Abstract: The most creative tasks in synthesizing pipelined data paths executing software descriptions are determinations of latency and stage of pipeline, operation scheduling and hardware allocation. They are interrelated closely and depend on each other; thus finding its optimal solution has been a hard problem so far. By using simulated annealing methodology, these three tasks can be formulated as a three dimensional placement problem of operations in stage, time step and functional units space. This paper presents an efficient method based on simulated annealing to provide excellent solutions to the problem of not only the determinations of latency and stage of pipeline, operation scheduling and hardware allocation simultaneously, but also the pipelined data path synthesis under the constraints of performance or hardware cost. It is able to find a near optimal latency and stage of pipeline, an operation schedule and a hardware allocation in a reasonable time, while effectively exploring the existing tradeoffs in the design space.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e78-a_8_1017/_p
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@ARTICLE{e78-a_8_1017,
author={Xing-jian XU, Mitsuru ISHIZUKA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Pipelined Data-Path Synthesis Method Based on Simulated Annealing},
year={1995},
volume={E78-A},
number={8},
pages={1017-1028},
abstract={The most creative tasks in synthesizing pipelined data paths executing software descriptions are determinations of latency and stage of pipeline, operation scheduling and hardware allocation. They are interrelated closely and depend on each other; thus finding its optimal solution has been a hard problem so far. By using simulated annealing methodology, these three tasks can be formulated as a three dimensional placement problem of operations in stage, time step and functional units space. This paper presents an efficient method based on simulated annealing to provide excellent solutions to the problem of not only the determinations of latency and stage of pipeline, operation scheduling and hardware allocation simultaneously, but also the pipelined data path synthesis under the constraints of performance or hardware cost. It is able to find a near optimal latency and stage of pipeline, an operation schedule and a hardware allocation in a reasonable time, while effectively exploring the existing tradeoffs in the design space.},
keywords={},
doi={},
ISSN={},
month={August},}
Copy
TY - JOUR
TI - A Pipelined Data-Path Synthesis Method Based on Simulated Annealing
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1017
EP - 1028
AU - Xing-jian XU
AU - Mitsuru ISHIZUKA
PY - 1995
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E78-A
IS - 8
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - August 1995
AB - The most creative tasks in synthesizing pipelined data paths executing software descriptions are determinations of latency and stage of pipeline, operation scheduling and hardware allocation. They are interrelated closely and depend on each other; thus finding its optimal solution has been a hard problem so far. By using simulated annealing methodology, these three tasks can be formulated as a three dimensional placement problem of operations in stage, time step and functional units space. This paper presents an efficient method based on simulated annealing to provide excellent solutions to the problem of not only the determinations of latency and stage of pipeline, operation scheduling and hardware allocation simultaneously, but also the pipelined data path synthesis under the constraints of performance or hardware cost. It is able to find a near optimal latency and stage of pipeline, an operation schedule and a hardware allocation in a reasonable time, while effectively exploring the existing tradeoffs in the design space.
ER -
English
