This paper presents an adaptive coding rate trellis-coded octal phase-shift keying system with rates of 1/3, 1/2, 2/3, and 5/6, under the restriction of a constant transmission bit rate, where the ratio between the informaion bits and error-correcting redundant bits varies according to channel conditions. This system has the advantage of using a simple modem configuration. Because it has no need to change modulation type, transmitter/receiver filters, and clock and carrier recovery circuits, and it can use a convenient Read-Only-Memory table encoder. As for code design, the trellis structures and its signal assignments for rates of 1/3, 1/2, and 5/6 are proposed and investigated, and their BER performances are estimated. As a result, when the system requirement is to keep the bit error rate of 10-4, this system can operate at the lower Eb/No value of 1.5dB on the reduction of transmitting information bits.
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Shigeo NAKAJIMA, "Adaptive Coding Rate Trellis-Coded 8PSK System" in IEICE TRANSACTIONS on Fundamentals,
vol. E80-A, no. 7, pp. 1190-1195, July 1997, doi: .
Abstract: This paper presents an adaptive coding rate trellis-coded octal phase-shift keying system with rates of 1/3, 1/2, 2/3, and 5/6, under the restriction of a constant transmission bit rate, where the ratio between the informaion bits and error-correcting redundant bits varies according to channel conditions. This system has the advantage of using a simple modem configuration. Because it has no need to change modulation type, transmitter/receiver filters, and clock and carrier recovery circuits, and it can use a convenient Read-Only-Memory table encoder. As for code design, the trellis structures and its signal assignments for rates of 1/3, 1/2, and 5/6 are proposed and investigated, and their BER performances are estimated. As a result, when the system requirement is to keep the bit error rate of 10-4, this system can operate at the lower Eb/No value of 1.5dB on the reduction of transmitting information bits.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e80-a_7_1190/_p
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@ARTICLE{e80-a_7_1190,
author={Shigeo NAKAJIMA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Adaptive Coding Rate Trellis-Coded 8PSK System},
year={1997},
volume={E80-A},
number={7},
pages={1190-1195},
abstract={This paper presents an adaptive coding rate trellis-coded octal phase-shift keying system with rates of 1/3, 1/2, 2/3, and 5/6, under the restriction of a constant transmission bit rate, where the ratio between the informaion bits and error-correcting redundant bits varies according to channel conditions. This system has the advantage of using a simple modem configuration. Because it has no need to change modulation type, transmitter/receiver filters, and clock and carrier recovery circuits, and it can use a convenient Read-Only-Memory table encoder. As for code design, the trellis structures and its signal assignments for rates of 1/3, 1/2, and 5/6 are proposed and investigated, and their BER performances are estimated. As a result, when the system requirement is to keep the bit error rate of 10-4, this system can operate at the lower Eb/No value of 1.5dB on the reduction of transmitting information bits.},
keywords={},
doi={},
ISSN={},
month={July},}
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TY - JOUR
TI - Adaptive Coding Rate Trellis-Coded 8PSK System
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1190
EP - 1195
AU - Shigeo NAKAJIMA
PY - 1997
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E80-A
IS - 7
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - July 1997
AB - This paper presents an adaptive coding rate trellis-coded octal phase-shift keying system with rates of 1/3, 1/2, 2/3, and 5/6, under the restriction of a constant transmission bit rate, where the ratio between the informaion bits and error-correcting redundant bits varies according to channel conditions. This system has the advantage of using a simple modem configuration. Because it has no need to change modulation type, transmitter/receiver filters, and clock and carrier recovery circuits, and it can use a convenient Read-Only-Memory table encoder. As for code design, the trellis structures and its signal assignments for rates of 1/3, 1/2, and 5/6 are proposed and investigated, and their BER performances are estimated. As a result, when the system requirement is to keep the bit error rate of 10-4, this system can operate at the lower Eb/No value of 1.5dB on the reduction of transmitting information bits.
ER -