In this paper, we present an efficient approach for technology scaling of MOS analog circuits by using circuit optimization techniques. Our new method is based on matching equivalent circuit parameters between a previously designed circuit and the circuit undergoing redesign. This method has been applied to a MOS operational amplifier. We were able to produce a redesigned circuit with almost the same performance in under 4 hours, making this method 5 times more efficient than conventional methods
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Seiji FUNABA, Akihiro KITAGAWA, Toshiro TSUKADA, Goichi YOKOMIZO, "A Fast and Accurate Method of Redesigning Analog Subcircuits for Technology Scaling" in IEICE TRANSACTIONS on Fundamentals,
vol. E82-A, no. 2, pp. 341-347, February 1999, doi: .
Abstract: In this paper, we present an efficient approach for technology scaling of MOS analog circuits by using circuit optimization techniques. Our new method is based on matching equivalent circuit parameters between a previously designed circuit and the circuit undergoing redesign. This method has been applied to a MOS operational amplifier. We were able to produce a redesigned circuit with almost the same performance in under 4 hours, making this method 5 times more efficient than conventional methods
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e82-a_2_341/_p
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@ARTICLE{e82-a_2_341,
author={Seiji FUNABA, Akihiro KITAGAWA, Toshiro TSUKADA, Goichi YOKOMIZO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Fast and Accurate Method of Redesigning Analog Subcircuits for Technology Scaling},
year={1999},
volume={E82-A},
number={2},
pages={341-347},
abstract={In this paper, we present an efficient approach for technology scaling of MOS analog circuits by using circuit optimization techniques. Our new method is based on matching equivalent circuit parameters between a previously designed circuit and the circuit undergoing redesign. This method has been applied to a MOS operational amplifier. We were able to produce a redesigned circuit with almost the same performance in under 4 hours, making this method 5 times more efficient than conventional methods},
keywords={},
doi={},
ISSN={},
month={February},}
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TY - JOUR
TI - A Fast and Accurate Method of Redesigning Analog Subcircuits for Technology Scaling
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 341
EP - 347
AU - Seiji FUNABA
AU - Akihiro KITAGAWA
AU - Toshiro TSUKADA
AU - Goichi YOKOMIZO
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E82-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 1999
AB - In this paper, we present an efficient approach for technology scaling of MOS analog circuits by using circuit optimization techniques. Our new method is based on matching equivalent circuit parameters between a previously designed circuit and the circuit undergoing redesign. This method has been applied to a MOS operational amplifier. We were able to produce a redesigned circuit with almost the same performance in under 4 hours, making this method 5 times more efficient than conventional methods
ER -