IEICE TRANSACTIONS on Fundamentals
A Delay Locked Loop Circuit with Mixed Mode Phase Tuning Technique
Summary :
This paper describes a DLL (Delay Locked Loop) circuit with the mixed-mode phase tuning method. The circuit accomplishes unlimited phase shift and accurate phase alignment through the coarse and fine phase tuning technique. It is based on a dual delay locked loop structure. The main loop is for generating coarsely spaced clocks and the second loop is for fast and accurate phase tuning with digital and analog phase detection. Simulations show that this circuit has 360 degree phase shift capability and can resolve 10 ps phase error using 0.6 µm CMOS technology.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E83-A No.9 pp.1860-1861
- Publication Date
- 2000/09/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- LETTER
- Category
- Analog Signal Processing
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Keyword
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Yeo-San SONG, Jin-Ku KANG, Kwang Sub YOON, "A Delay Locked Loop Circuit with Mixed Mode Phase Tuning Technique" in IEICE TRANSACTIONS on Fundamentals,
vol. E83-A, no. 9, pp. 1860-1861, September 2000, doi: .
Abstract: This paper describes a DLL (Delay Locked Loop) circuit with the mixed-mode phase tuning method. The circuit accomplishes unlimited phase shift and accurate phase alignment through the coarse and fine phase tuning technique. It is based on a dual delay locked loop structure. The main loop is for generating coarsely spaced clocks and the second loop is for fast and accurate phase tuning with digital and analog phase detection. Simulations show that this circuit has 360 degree phase shift capability and can resolve 10 ps phase error using 0.6 µm CMOS technology.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e83-a_9_1860/_p
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@ARTICLE{e83-a_9_1860,
author={Yeo-San SONG, Jin-Ku KANG, Kwang Sub YOON, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Delay Locked Loop Circuit with Mixed Mode Phase Tuning Technique},
year={2000},
volume={E83-A},
number={9},
pages={1860-1861},
abstract={This paper describes a DLL (Delay Locked Loop) circuit with the mixed-mode phase tuning method. The circuit accomplishes unlimited phase shift and accurate phase alignment through the coarse and fine phase tuning technique. It is based on a dual delay locked loop structure. The main loop is for generating coarsely spaced clocks and the second loop is for fast and accurate phase tuning with digital and analog phase detection. Simulations show that this circuit has 360 degree phase shift capability and can resolve 10 ps phase error using 0.6 µm CMOS technology.},
keywords={},
doi={},
ISSN={},
month={September},}
Copy
TY - JOUR
TI - A Delay Locked Loop Circuit with Mixed Mode Phase Tuning Technique
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1860
EP - 1861
AU - Yeo-San SONG
AU - Jin-Ku KANG
AU - Kwang Sub YOON
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E83-A
IS - 9
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - September 2000
AB - This paper describes a DLL (Delay Locked Loop) circuit with the mixed-mode phase tuning method. The circuit accomplishes unlimited phase shift and accurate phase alignment through the coarse and fine phase tuning technique. It is based on a dual delay locked loop structure. The main loop is for generating coarsely spaced clocks and the second loop is for fast and accurate phase tuning with digital and analog phase detection. Simulations show that this circuit has 360 degree phase shift capability and can resolve 10 ps phase error using 0.6 µm CMOS technology.
ER -
English
