IEICE TRANSACTIONS on Fundamentals
Synthesis for Multiple Input Wire Replacement of a Gate: Theorems and Applications
Summary :
The single wire replacement attempts to replace a target wire by another wire without changing the circuit functionality. Due to the large searching space required, there is very little success in directly extending the single wire replacement technique to replace multiple wires at the same time. The objective in this paper is to propose a new logic transformation, called the alternative node (Alnode) technique, which attempts to replace multiple wires at a time. Basically, the transformation simultaneously replaces multiple input wires of a gate by a new set of input wires. To accomplish the transformation, we propose several speedup theorems for replacing multiple wires. In this paper, we also demonstrate that the Alnode technique can be applied to achieve power reduction for domino logic and wire length minimization in layouts. The experimental results are encouraging.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E84-A No.12 pp.3116-3124
- Publication Date
- 2001/12/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- VLSI Design Technology and CAD
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Shih-Chieh CHANG, Zhong-Zhen WU, Sheng-Hong TU, "Synthesis for Multiple Input Wire Replacement of a Gate: Theorems and Applications" in IEICE TRANSACTIONS on Fundamentals,
vol. E84-A, no. 12, pp. 3116-3124, December 2001, doi: .
Abstract: The single wire replacement attempts to replace a target wire by another wire without changing the circuit functionality. Due to the large searching space required, there is very little success in directly extending the single wire replacement technique to replace multiple wires at the same time. The objective in this paper is to propose a new logic transformation, called the alternative node (Alnode) technique, which attempts to replace multiple wires at a time. Basically, the transformation simultaneously replaces multiple input wires of a gate by a new set of input wires. To accomplish the transformation, we propose several speedup theorems for replacing multiple wires. In this paper, we also demonstrate that the Alnode technique can be applied to achieve power reduction for domino logic and wire length minimization in layouts. The experimental results are encouraging.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e84-a_12_3116/_p
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@ARTICLE{e84-a_12_3116,
author={Shih-Chieh CHANG, Zhong-Zhen WU, Sheng-Hong TU, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Synthesis for Multiple Input Wire Replacement of a Gate: Theorems and Applications},
year={2001},
volume={E84-A},
number={12},
pages={3116-3124},
abstract={The single wire replacement attempts to replace a target wire by another wire without changing the circuit functionality. Due to the large searching space required, there is very little success in directly extending the single wire replacement technique to replace multiple wires at the same time. The objective in this paper is to propose a new logic transformation, called the alternative node (Alnode) technique, which attempts to replace multiple wires at a time. Basically, the transformation simultaneously replaces multiple input wires of a gate by a new set of input wires. To accomplish the transformation, we propose several speedup theorems for replacing multiple wires. In this paper, we also demonstrate that the Alnode technique can be applied to achieve power reduction for domino logic and wire length minimization in layouts. The experimental results are encouraging.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - Synthesis for Multiple Input Wire Replacement of a Gate: Theorems and Applications
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3116
EP - 3124
AU - Shih-Chieh CHANG
AU - Zhong-Zhen WU
AU - Sheng-Hong TU
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E84-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2001
AB - The single wire replacement attempts to replace a target wire by another wire without changing the circuit functionality. Due to the large searching space required, there is very little success in directly extending the single wire replacement technique to replace multiple wires at the same time. The objective in this paper is to propose a new logic transformation, called the alternative node (Alnode) technique, which attempts to replace multiple wires at a time. Basically, the transformation simultaneously replaces multiple input wires of a gate by a new set of input wires. To accomplish the transformation, we propose several speedup theorems for replacing multiple wires. In this paper, we also demonstrate that the Alnode technique can be applied to achieve power reduction for domino logic and wire length minimization in layouts. The experimental results are encouraging.
ER -
English
