This paper presents a unified representation of fast addition algorithms based on Counter Tree Diagrams (CTDs). By using CTDs, we can describe and analyze various adder architectures in a systematic way without using specific knowledge about underlying arithmetic algorithms. Examples of adder architectures that can be handled by CTDs include Redundant-Binary (RB) adders, Signed-Digit (SD) adders, Positive-Digit (PD) adders, carry-save adders, parallel counters (e.g., 3-2 counters and 4-2 counters) and networks of such basic adders/counters. This paper also discusses the CTD-based analysis of carry-propagation-free adders using various number representations.
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Jun SAKIYAMA, Naofumi HOMMA, Takafumi AOKI, Tatsuo HIGUCHI, "Counter Tree Diagrams: A Unified Framework for Analyzing Fast Addition Algorithms" in IEICE TRANSACTIONS on Fundamentals,
vol. E86-A, no. 12, pp. 3009-3019, December 2003, doi: .
Abstract: This paper presents a unified representation of fast addition algorithms based on Counter Tree Diagrams (CTDs). By using CTDs, we can describe and analyze various adder architectures in a systematic way without using specific knowledge about underlying arithmetic algorithms. Examples of adder architectures that can be handled by CTDs include Redundant-Binary (RB) adders, Signed-Digit (SD) adders, Positive-Digit (PD) adders, carry-save adders, parallel counters (e.g., 3-2 counters and 4-2 counters) and networks of such basic adders/counters. This paper also discusses the CTD-based analysis of carry-propagation-free adders using various number representations.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e86-a_12_3009/_p
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@ARTICLE{e86-a_12_3009,
author={Jun SAKIYAMA, Naofumi HOMMA, Takafumi AOKI, Tatsuo HIGUCHI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Counter Tree Diagrams: A Unified Framework for Analyzing Fast Addition Algorithms},
year={2003},
volume={E86-A},
number={12},
pages={3009-3019},
abstract={This paper presents a unified representation of fast addition algorithms based on Counter Tree Diagrams (CTDs). By using CTDs, we can describe and analyze various adder architectures in a systematic way without using specific knowledge about underlying arithmetic algorithms. Examples of adder architectures that can be handled by CTDs include Redundant-Binary (RB) adders, Signed-Digit (SD) adders, Positive-Digit (PD) adders, carry-save adders, parallel counters (e.g., 3-2 counters and 4-2 counters) and networks of such basic adders/counters. This paper also discusses the CTD-based analysis of carry-propagation-free adders using various number representations.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - Counter Tree Diagrams: A Unified Framework for Analyzing Fast Addition Algorithms
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3009
EP - 3019
AU - Jun SAKIYAMA
AU - Naofumi HOMMA
AU - Takafumi AOKI
AU - Tatsuo HIGUCHI
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E86-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2003
AB - This paper presents a unified representation of fast addition algorithms based on Counter Tree Diagrams (CTDs). By using CTDs, we can describe and analyze various adder architectures in a systematic way without using specific knowledge about underlying arithmetic algorithms. Examples of adder architectures that can be handled by CTDs include Redundant-Binary (RB) adders, Signed-Digit (SD) adders, Positive-Digit (PD) adders, carry-save adders, parallel counters (e.g., 3-2 counters and 4-2 counters) and networks of such basic adders/counters. This paper also discusses the CTD-based analysis of carry-propagation-free adders using various number representations.
ER -