IEICE TRANSACTIONS on Fundamentals
Application of Error Diagnosis Technique to Incremental Synthesis
Summary :
In an LSI design process, Engineering Change Orders (ECO's) are often given even after the layout process. This letter presents an approach to change the design to satisfy the new specification with ECO's by employing an error diagnosis technique. Our approach performs incremental synthesis using spare cells embedded on the original layout. Experimental results show that applying the error diagnosis technique to incremental synthesis is effective to suppress increase in delay time caused by ECO's.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E86-A No.12 pp.3214-3217
- Publication Date
- 2003/12/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section LETTER (Special Section on VLSI Design and CAD Algorithms)
- Category
- Design Methodology
Authors
Keyword
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Hiroshi INOUE, Takahiro IWASAKI, Toshifumi SUGANE, Masahiro NUMA, Keisuke YAMAMOTO, "Application of Error Diagnosis Technique to Incremental Synthesis" in IEICE TRANSACTIONS on Fundamentals,
vol. E86-A, no. 12, pp. 3214-3217, December 2003, doi: .
Abstract: In an LSI design process, Engineering Change Orders (ECO's) are often given even after the layout process. This letter presents an approach to change the design to satisfy the new specification with ECO's by employing an error diagnosis technique. Our approach performs incremental synthesis using spare cells embedded on the original layout. Experimental results show that applying the error diagnosis technique to incremental synthesis is effective to suppress increase in delay time caused by ECO's.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e86-a_12_3214/_p
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@ARTICLE{e86-a_12_3214,
author={Hiroshi INOUE, Takahiro IWASAKI, Toshifumi SUGANE, Masahiro NUMA, Keisuke YAMAMOTO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Application of Error Diagnosis Technique to Incremental Synthesis},
year={2003},
volume={E86-A},
number={12},
pages={3214-3217},
abstract={In an LSI design process, Engineering Change Orders (ECO's) are often given even after the layout process. This letter presents an approach to change the design to satisfy the new specification with ECO's by employing an error diagnosis technique. Our approach performs incremental synthesis using spare cells embedded on the original layout. Experimental results show that applying the error diagnosis technique to incremental synthesis is effective to suppress increase in delay time caused by ECO's.},
keywords={},
doi={},
ISSN={},
month={December},}
Copy
TY - JOUR
TI - Application of Error Diagnosis Technique to Incremental Synthesis
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3214
EP - 3217
AU - Hiroshi INOUE
AU - Takahiro IWASAKI
AU - Toshifumi SUGANE
AU - Masahiro NUMA
AU - Keisuke YAMAMOTO
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E86-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2003
AB - In an LSI design process, Engineering Change Orders (ECO's) are often given even after the layout process. This letter presents an approach to change the design to satisfy the new specification with ECO's by employing an error diagnosis technique. Our approach performs incremental synthesis using spare cells embedded on the original layout. Experimental results show that applying the error diagnosis technique to incremental synthesis is effective to suppress increase in delay time caused by ECO's.
ER -
English
