IEICE TRANSACTIONS on Fundamentals
A Lifting Implementation of Variable-Coefficient Invertible Deinterlacer with Embedded Motion Detector
Summary :
In this paper, a lifting implementation of variable-coefficient invertible deinterlacer with embedded motion detector is proposed. As previous works, the authors have developed invertible deinterlacing that suppresses comb-tooth artifacts caused by field interleaving for interlaced scanning video, which affect the quality of intraframe-based codec such as Motion-JPEG2000. To improve the local adaptability for given pictures, its variable-coefficient processing with motion detection has also been proposed so that filters can be changed according to local properties of motion pictures, while maintaining the invertibility. In this paper, it is shown that the variable-coefficient invertible deinterlacing can be realized by a lifting-based simple hardware architecture, and motion detector can also be embedded. Both of the motion detection and deinterlacing filters are shared by a special choice of their coefficients, and by adaptive selection of deinterlacing filters. The significance of our proposed architecture is verified by showing synthesis results from the VHDL models. The proposed implementation with embedded motion detector achieves about 28% reduction of the gate count compared with the corresponding separate implementation.
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- IEICE TRANSACTIONS on Fundamentals Vol.E86-A No.8 pp.1942-1948
- Publication Date
- 2003/08/01
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- Special Section PAPER (Special Section on Digital Signal Processing)
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Takuma ISHIDA, Tatsuumi SOYAMA, Shogo MURAMATSU, Hisakazu KIKUCHI, Tetsuro KUGE, "A Lifting Implementation of Variable-Coefficient Invertible Deinterlacer with Embedded Motion Detector" in IEICE TRANSACTIONS on Fundamentals,
vol. E86-A, no. 8, pp. 1942-1948, August 2003, doi: .
Abstract: In this paper, a lifting implementation of variable-coefficient invertible deinterlacer with embedded motion detector is proposed. As previous works, the authors have developed invertible deinterlacing that suppresses comb-tooth artifacts caused by field interleaving for interlaced scanning video, which affect the quality of intraframe-based codec such as Motion-JPEG2000. To improve the local adaptability for given pictures, its variable-coefficient processing with motion detection has also been proposed so that filters can be changed according to local properties of motion pictures, while maintaining the invertibility. In this paper, it is shown that the variable-coefficient invertible deinterlacing can be realized by a lifting-based simple hardware architecture, and motion detector can also be embedded. Both of the motion detection and deinterlacing filters are shared by a special choice of their coefficients, and by adaptive selection of deinterlacing filters. The significance of our proposed architecture is verified by showing synthesis results from the VHDL models. The proposed implementation with embedded motion detector achieves about 28% reduction of the gate count compared with the corresponding separate implementation.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e86-a_8_1942/_p
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@ARTICLE{e86-a_8_1942,
author={Takuma ISHIDA, Tatsuumi SOYAMA, Shogo MURAMATSU, Hisakazu KIKUCHI, Tetsuro KUGE, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Lifting Implementation of Variable-Coefficient Invertible Deinterlacer with Embedded Motion Detector},
year={2003},
volume={E86-A},
number={8},
pages={1942-1948},
abstract={In this paper, a lifting implementation of variable-coefficient invertible deinterlacer with embedded motion detector is proposed. As previous works, the authors have developed invertible deinterlacing that suppresses comb-tooth artifacts caused by field interleaving for interlaced scanning video, which affect the quality of intraframe-based codec such as Motion-JPEG2000. To improve the local adaptability for given pictures, its variable-coefficient processing with motion detection has also been proposed so that filters can be changed according to local properties of motion pictures, while maintaining the invertibility. In this paper, it is shown that the variable-coefficient invertible deinterlacing can be realized by a lifting-based simple hardware architecture, and motion detector can also be embedded. Both of the motion detection and deinterlacing filters are shared by a special choice of their coefficients, and by adaptive selection of deinterlacing filters. The significance of our proposed architecture is verified by showing synthesis results from the VHDL models. The proposed implementation with embedded motion detector achieves about 28% reduction of the gate count compared with the corresponding separate implementation.},
keywords={},
doi={},
ISSN={},
month={August},}
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TY - JOUR
TI - A Lifting Implementation of Variable-Coefficient Invertible Deinterlacer with Embedded Motion Detector
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1942
EP - 1948
AU - Takuma ISHIDA
AU - Tatsuumi SOYAMA
AU - Shogo MURAMATSU
AU - Hisakazu KIKUCHI
AU - Tetsuro KUGE
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E86-A
IS - 8
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - August 2003
AB - In this paper, a lifting implementation of variable-coefficient invertible deinterlacer with embedded motion detector is proposed. As previous works, the authors have developed invertible deinterlacing that suppresses comb-tooth artifacts caused by field interleaving for interlaced scanning video, which affect the quality of intraframe-based codec such as Motion-JPEG2000. To improve the local adaptability for given pictures, its variable-coefficient processing with motion detection has also been proposed so that filters can be changed according to local properties of motion pictures, while maintaining the invertibility. In this paper, it is shown that the variable-coefficient invertible deinterlacing can be realized by a lifting-based simple hardware architecture, and motion detector can also be embedded. Both of the motion detection and deinterlacing filters are shared by a special choice of their coefficients, and by adaptive selection of deinterlacing filters. The significance of our proposed architecture is verified by showing synthesis results from the VHDL models. The proposed implementation with embedded motion detector achieves about 28% reduction of the gate count compared with the corresponding separate implementation.
ER -
English
