VLSI Design for Embedded Digital Watermarking JPEG Encoder Based on Digital Camera System

Tsung-Han TSAI; Chrong-Yi LU

VLSI Design for Embedded Digital Watermarking JPEG Encoder Based on Digital Camera System

Tsung-Han TSAI, Chrong-Yi LU

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In this paper a new watermarking technique which is combined with joint photographic experts group (JPEG) encoding system is presented. This method operates in the frequency domain by embedding a pseudo-random sequence of real numbers in a selected set of discrete cosine transform (DCT) coefficients. The embedded sequence is extracted without restoring the original image to fit the trend in the digital still camera (DSC) system. The proposed technique represents a major improvement on methods relying on the comparison between the watermarked and original images. Experimental results show that the proposed watermarking method is robust to several common image processing techniques, including JPEG compression, noise, and blurring. We also implement the whole design by synthesizing with TSMC 1P4M 0.35 µm standard cell. The chip size is 3.0643.064 mm² for 46374 gate counts. The simulation speed can reach 50 MHz. The power dissipation is 69 mW at 3.3 V 50 MHz.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E87-A No.7 pp.1772-1780

Publication Date: 2004/07/01

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Type of Manuscript: PAPER

Category: VLSI Design Technology and CAD

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Tsung-Han TSAI, Chrong-Yi LU, "VLSI Design for Embedded Digital Watermarking JPEG Encoder Based on Digital Camera System" in IEICE TRANSACTIONS on Fundamentals, vol. E87-A, no. 7, pp. 1772-1780, July 2004, doi: .
Abstract: In this paper a new watermarking technique which is combined with joint photographic experts group (JPEG) encoding system is presented. This method operates in the frequency domain by embedding a pseudo-random sequence of real numbers in a selected set of discrete cosine transform (DCT) coefficients. The embedded sequence is extracted without restoring the original image to fit the trend in the digital still camera (DSC) system. The proposed technique represents a major improvement on methods relying on the comparison between the watermarked and original images. Experimental results show that the proposed watermarking method is robust to several common image processing techniques, including JPEG compression, noise, and blurring. We also implement the whole design by synthesizing with TSMC 1P4M 0.35 µm standard cell. The chip size is 3.0643.064 mm² for 46374 gate counts. The simulation speed can reach 50 MHz. The power dissipation is 69 mW at 3.3 V 50 MHz.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e87-a_7_1772/_p

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@ARTICLE{e87-a_7_1772,
author={Tsung-Han TSAI, Chrong-Yi LU, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={VLSI Design for Embedded Digital Watermarking JPEG Encoder Based on Digital Camera System},
year={2004},
volume={E87-A},
number={7},
pages={1772-1780},
abstract={In this paper a new watermarking technique which is combined with joint photographic experts group (JPEG) encoding system is presented. This method operates in the frequency domain by embedding a pseudo-random sequence of real numbers in a selected set of discrete cosine transform (DCT) coefficients. The embedded sequence is extracted without restoring the original image to fit the trend in the digital still camera (DSC) system. The proposed technique represents a major improvement on methods relying on the comparison between the watermarked and original images. Experimental results show that the proposed watermarking method is robust to several common image processing techniques, including JPEG compression, noise, and blurring. We also implement the whole design by synthesizing with TSMC 1P4M 0.35 µm standard cell. The chip size is 3.0643.064 mm² for 46374 gate counts. The simulation speed can reach 50 MHz. The power dissipation is 69 mW at 3.3 V 50 MHz.},
keywords={},
doi={},
ISSN={},
month={July},}

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TY - JOUR
TI - VLSI Design for Embedded Digital Watermarking JPEG Encoder Based on Digital Camera System
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1772
EP - 1780
AU - Tsung-Han TSAI
AU - Chrong-Yi LU
PY - 2004
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E87-A
IS - 7
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - July 2004
AB - In this paper a new watermarking technique which is combined with joint photographic experts group (JPEG) encoding system is presented. This method operates in the frequency domain by embedding a pseudo-random sequence of real numbers in a selected set of discrete cosine transform (DCT) coefficients. The embedded sequence is extracted without restoring the original image to fit the trend in the digital still camera (DSC) system. The proposed technique represents a major improvement on methods relying on the comparison between the watermarked and original images. Experimental results show that the proposed watermarking method is robust to several common image processing techniques, including JPEG compression, noise, and blurring. We also implement the whole design by synthesizing with TSMC 1P4M 0.35 µm standard cell. The chip size is 3.0643.064 mm² for 46374 gate counts. The simulation speed can reach 50 MHz. The power dissipation is 69 mW at 3.3 V 50 MHz.
ER -