IEICE TRANSACTIONS on Fundamentals
Novel Design Procedure for MOSFET Class E Oscillator
Summary :
This paper presents a novel design procedure for class E oscillator. It is the characteristic of the proposed design procedure that a free-running oscillator is considered as a forced oscillator and the feedback waveform is tuned to the timing of the switching. By using the proposed design procedure, it is possible to design class E oscillator that cannot be designed by the conventional one. By carrying out two circuit experiments, we find that the experimental results agree with the calculated ones quantitatively, and show the validity of the proposed design procedure. One experimental measured power conversion efficiency is 90.7% under 6.8 W output power at an operating frequency 2.02 MHz, the other is 89.7% under 2.8 W output power at an operating frequency 1.97 MHz.
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- IEICE TRANSACTIONS on Fundamentals Vol.E87-A No.9 pp.2241-2247
- Publication Date
- 2004/09/01
- Publicized
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- Special Section PAPER (Special Section on Nonlinear Theory and its Applications)
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Hiroyuki HASE, Hiroo SEKIYA, Jianming LU, Takashi YAHAGI, "Novel Design Procedure for MOSFET Class E Oscillator" in IEICE TRANSACTIONS on Fundamentals,
vol. E87-A, no. 9, pp. 2241-2247, September 2004, doi: .
Abstract: This paper presents a novel design procedure for class E oscillator. It is the characteristic of the proposed design procedure that a free-running oscillator is considered as a forced oscillator and the feedback waveform is tuned to the timing of the switching. By using the proposed design procedure, it is possible to design class E oscillator that cannot be designed by the conventional one. By carrying out two circuit experiments, we find that the experimental results agree with the calculated ones quantitatively, and show the validity of the proposed design procedure. One experimental measured power conversion efficiency is 90.7% under 6.8 W output power at an operating frequency 2.02 MHz, the other is 89.7% under 2.8 W output power at an operating frequency 1.97 MHz.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e87-a_9_2241/_p
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@ARTICLE{e87-a_9_2241,
author={Hiroyuki HASE, Hiroo SEKIYA, Jianming LU, Takashi YAHAGI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Novel Design Procedure for MOSFET Class E Oscillator},
year={2004},
volume={E87-A},
number={9},
pages={2241-2247},
abstract={This paper presents a novel design procedure for class E oscillator. It is the characteristic of the proposed design procedure that a free-running oscillator is considered as a forced oscillator and the feedback waveform is tuned to the timing of the switching. By using the proposed design procedure, it is possible to design class E oscillator that cannot be designed by the conventional one. By carrying out two circuit experiments, we find that the experimental results agree with the calculated ones quantitatively, and show the validity of the proposed design procedure. One experimental measured power conversion efficiency is 90.7% under 6.8 W output power at an operating frequency 2.02 MHz, the other is 89.7% under 2.8 W output power at an operating frequency 1.97 MHz.},
keywords={},
doi={},
ISSN={},
month={September},}
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TY - JOUR
TI - Novel Design Procedure for MOSFET Class E Oscillator
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2241
EP - 2247
AU - Hiroyuki HASE
AU - Hiroo SEKIYA
AU - Jianming LU
AU - Takashi YAHAGI
PY - 2004
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E87-A
IS - 9
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - September 2004
AB - This paper presents a novel design procedure for class E oscillator. It is the characteristic of the proposed design procedure that a free-running oscillator is considered as a forced oscillator and the feedback waveform is tuned to the timing of the switching. By using the proposed design procedure, it is possible to design class E oscillator that cannot be designed by the conventional one. By carrying out two circuit experiments, we find that the experimental results agree with the calculated ones quantitatively, and show the validity of the proposed design procedure. One experimental measured power conversion efficiency is 90.7% under 6.8 W output power at an operating frequency 2.02 MHz, the other is 89.7% under 2.8 W output power at an operating frequency 1.97 MHz.
ER -
English
