IEICE TRANSACTIONS on Fundamentals
Supporting Predictable Performance Guarantees for SMT Processors
Summary :
Simultaneous multithreading (SMT) technology improves CPU throughput, but also causes unpredictable performance fluctuations for co-running workloads. Although recent major SMT processors have adopted some techniques to promote hardware support for quality-of-service (QoS), achieving both precise performance guarantees and high throughput on SMT architectures is still a challenging open problem. In this paper, we demonstrate through some comprehensive investigations on a cycle-accurate simulator that not only almost all in-core resources suffer from severe contention as workloads vary but also there is a non-linear relationship between performance and available quotas of resources. We consider these observations as the fundamental reason leading to the challenging problem above. Thus, we introduce QoSMT, a novel hardware scheme that leverages a closed-loop controlling mechanism consisting of detection, prediction and adjustment to enforce precise performance guarantees for specific targets, e.g. achieving 85%, 90% or 95% of the performance of a workload running alone respectively. We implement a prototype on GEM5 simulator. Experimental results show that the average control error is only 1.4%, 0.5% and 3.6%.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E103-A No.6 pp.806-820
- Publication Date
- 2020/06/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.2019EAP1146
- Type of Manuscript
- PAPER
- Category
- VLSI Design Technology and CAD
Authors
Xin JIN
Xi'an University of Technology
Ningmei YU
Xi'an University of Technology
Yaoyang ZHOU
CAS
Bowen HUANG
CAS
Zihao YU
CAS
Xusheng ZHAN
CAS
Huizhe WANG
CAS
Sa WANG
CAS
Yungang BAO
CAS
Keyword
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Xin JIN, Ningmei YU, Yaoyang ZHOU, Bowen HUANG, Zihao YU, Xusheng ZHAN, Huizhe WANG, Sa WANG, Yungang BAO, "Supporting Predictable Performance Guarantees for SMT Processors" in IEICE TRANSACTIONS on Fundamentals,
vol. E103-A, no. 6, pp. 806-820, June 2020, doi: 10.1587/transfun.2019EAP1146.
Abstract: Simultaneous multithreading (SMT) technology improves CPU throughput, but also causes unpredictable performance fluctuations for co-running workloads. Although recent major SMT processors have adopted some techniques to promote hardware support for quality-of-service (QoS), achieving both precise performance guarantees and high throughput on SMT architectures is still a challenging open problem. In this paper, we demonstrate through some comprehensive investigations on a cycle-accurate simulator that not only almost all in-core resources suffer from severe contention as workloads vary but also there is a non-linear relationship between performance and available quotas of resources. We consider these observations as the fundamental reason leading to the challenging problem above. Thus, we introduce QoSMT, a novel hardware scheme that leverages a closed-loop controlling mechanism consisting of detection, prediction and adjustment to enforce precise performance guarantees for specific targets, e.g. achieving 85%, 90% or 95% of the performance of a workload running alone respectively. We implement a prototype on GEM5 simulator. Experimental results show that the average control error is only 1.4%, 0.5% and 3.6%.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.2019EAP1146/_p
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@ARTICLE{e103-a_6_806,
author={Xin JIN, Ningmei YU, Yaoyang ZHOU, Bowen HUANG, Zihao YU, Xusheng ZHAN, Huizhe WANG, Sa WANG, Yungang BAO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Supporting Predictable Performance Guarantees for SMT Processors},
year={2020},
volume={E103-A},
number={6},
pages={806-820},
abstract={Simultaneous multithreading (SMT) technology improves CPU throughput, but also causes unpredictable performance fluctuations for co-running workloads. Although recent major SMT processors have adopted some techniques to promote hardware support for quality-of-service (QoS), achieving both precise performance guarantees and high throughput on SMT architectures is still a challenging open problem. In this paper, we demonstrate through some comprehensive investigations on a cycle-accurate simulator that not only almost all in-core resources suffer from severe contention as workloads vary but also there is a non-linear relationship between performance and available quotas of resources. We consider these observations as the fundamental reason leading to the challenging problem above. Thus, we introduce QoSMT, a novel hardware scheme that leverages a closed-loop controlling mechanism consisting of detection, prediction and adjustment to enforce precise performance guarantees for specific targets, e.g. achieving 85%, 90% or 95% of the performance of a workload running alone respectively. We implement a prototype on GEM5 simulator. Experimental results show that the average control error is only 1.4%, 0.5% and 3.6%.},
keywords={},
doi={10.1587/transfun.2019EAP1146},
ISSN={1745-1337},
month={June},}
Copy
TY - JOUR
TI - Supporting Predictable Performance Guarantees for SMT Processors
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 806
EP - 820
AU - Xin JIN
AU - Ningmei YU
AU - Yaoyang ZHOU
AU - Bowen HUANG
AU - Zihao YU
AU - Xusheng ZHAN
AU - Huizhe WANG
AU - Sa WANG
AU - Yungang BAO
PY - 2020
DO - 10.1587/transfun.2019EAP1146
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E103-A
IS - 6
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - June 2020
AB - Simultaneous multithreading (SMT) technology improves CPU throughput, but also causes unpredictable performance fluctuations for co-running workloads. Although recent major SMT processors have adopted some techniques to promote hardware support for quality-of-service (QoS), achieving both precise performance guarantees and high throughput on SMT architectures is still a challenging open problem. In this paper, we demonstrate through some comprehensive investigations on a cycle-accurate simulator that not only almost all in-core resources suffer from severe contention as workloads vary but also there is a non-linear relationship between performance and available quotas of resources. We consider these observations as the fundamental reason leading to the challenging problem above. Thus, we introduce QoSMT, a novel hardware scheme that leverages a closed-loop controlling mechanism consisting of detection, prediction and adjustment to enforce precise performance guarantees for specific targets, e.g. achieving 85%, 90% or 95% of the performance of a workload running alone respectively. We implement a prototype on GEM5 simulator. Experimental results show that the average control error is only 1.4%, 0.5% and 3.6%.
ER -
English
