Joint BCH and XOR Decoding for Solid State Drives
Summary :
At a flash memory, each stored data frame is protected by error correction codes (ECC) such as Bose-Chaudhuri-Hocquenghem (BCH) codes from random errors. Exclusive-OR (XOR) based erasure codes like RAID-5 have also been employed at the flash memory to protect from memory block defects. Conventionally, the ECC and erasure codes are used separately since their target errors are different. Due to recent aggressive technology scaling, additional error correction capability for random errors is required without adding redundancy. We propose an algorithm to improve error correction capability by using XOR parity with a simple counter that counts the number of unreliable bits in the XOR stripe. We also propose to apply Chase decoding to the proposed algorithm. The counter makes it possible to reduce the false correction and execute the efficient Chase decoding. We show that combining the proposed algorithm with Chase decoding can significantly improve the decoding performance.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E106-A No.10 pp.1322-1329
- Publication Date
- 2023/10/01
- Publicized
- 2023/04/12
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.2022EAP1119
- Type of Manuscript
- PAPER
- Category
- Coding Theory
Authors
Naoko KIFUNE
Kioxia Corporation
Hironori UCHIKAWA
Kioxia Corporation
Keyword
Latest Issue
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Naoko KIFUNE, Hironori UCHIKAWA, "Joint BCH and XOR Decoding for Solid State Drives" in IEICE TRANSACTIONS on Fundamentals,
vol. E106-A, no. 10, pp. 1322-1329, October 2023, doi: 10.1587/transfun.2022EAP1119.
Abstract: At a flash memory, each stored data frame is protected by error correction codes (ECC) such as Bose-Chaudhuri-Hocquenghem (BCH) codes from random errors. Exclusive-OR (XOR) based erasure codes like RAID-5 have also been employed at the flash memory to protect from memory block defects. Conventionally, the ECC and erasure codes are used separately since their target errors are different. Due to recent aggressive technology scaling, additional error correction capability for random errors is required without adding redundancy. We propose an algorithm to improve error correction capability by using XOR parity with a simple counter that counts the number of unreliable bits in the XOR stripe. We also propose to apply Chase decoding to the proposed algorithm. The counter makes it possible to reduce the false correction and execute the efficient Chase decoding. We show that combining the proposed algorithm with Chase decoding can significantly improve the decoding performance.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.2022EAP1119/_p
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@ARTICLE{e106-a_10_1322,
author={Naoko KIFUNE, Hironori UCHIKAWA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Joint BCH and XOR Decoding for Solid State Drives},
year={2023},
volume={E106-A},
number={10},
pages={1322-1329},
abstract={At a flash memory, each stored data frame is protected by error correction codes (ECC) such as Bose-Chaudhuri-Hocquenghem (BCH) codes from random errors. Exclusive-OR (XOR) based erasure codes like RAID-5 have also been employed at the flash memory to protect from memory block defects. Conventionally, the ECC and erasure codes are used separately since their target errors are different. Due to recent aggressive technology scaling, additional error correction capability for random errors is required without adding redundancy. We propose an algorithm to improve error correction capability by using XOR parity with a simple counter that counts the number of unreliable bits in the XOR stripe. We also propose to apply Chase decoding to the proposed algorithm. The counter makes it possible to reduce the false correction and execute the efficient Chase decoding. We show that combining the proposed algorithm with Chase decoding can significantly improve the decoding performance.},
keywords={},
doi={10.1587/transfun.2022EAP1119},
ISSN={1745-1337},
month={October},}
Copy
TY - JOUR
TI - Joint BCH and XOR Decoding for Solid State Drives
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1322
EP - 1329
AU - Naoko KIFUNE
AU - Hironori UCHIKAWA
PY - 2023
DO - 10.1587/transfun.2022EAP1119
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E106-A
IS - 10
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - October 2023
AB - At a flash memory, each stored data frame is protected by error correction codes (ECC) such as Bose-Chaudhuri-Hocquenghem (BCH) codes from random errors. Exclusive-OR (XOR) based erasure codes like RAID-5 have also been employed at the flash memory to protect from memory block defects. Conventionally, the ECC and erasure codes are used separately since their target errors are different. Due to recent aggressive technology scaling, additional error correction capability for random errors is required without adding redundancy. We propose an algorithm to improve error correction capability by using XOR parity with a simple counter that counts the number of unreliable bits in the XOR stripe. We also propose to apply Chase decoding to the proposed algorithm. The counter makes it possible to reduce the false correction and execute the efficient Chase decoding. We show that combining the proposed algorithm with Chase decoding can significantly improve the decoding performance.
ER -
English
