IEICE TRANSACTIONS on Fundamentals
Consideration of Integrated Low-Frequency Low-Pass Notch Filter Employing CCII Based Capacitance Multipliers
Summary :
In a field of biomedical engineering, not only low-pass filters for high frequency elimination but also notch filters for suppressing powerline interference are necessary to process low-frequency biosignals. For integration of low-frequency filters, chip implementation of large capacitances is major difficulty. As methods to enhance capacitances with small chip area, use of capacitance multipliers is effective. This letter describes design consideration of integrated low-frequency low-pass notch filter employing capacitance multipliers. Two main points are presented. Firstly, a new floating capacitance multiplier is proposed. Secondly, a technique to reduce the number of capacitance multipliers is proposed. By this technique, power consumption is reduced. The proposed techniques are applied a 3rd order low-pass notch filter. Simulation results show the effectiveness of the proposed techniques.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E107-A No.1 pp.114-118
- Publication Date
- 2024/01/01
- Publicized
- 2023/07/19
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.2023KEL0001
- Type of Manuscript
- Special Section LETTER (Special Section on Circuits and Systems)
- Category
Authors
Fujihiko MATSUMOTO
National Defense Academy
Hinano OHTSU
National Defense Academy
Keyword
Latest Issue
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Fujihiko MATSUMOTO, Hinano OHTSU, "Consideration of Integrated Low-Frequency Low-Pass Notch Filter Employing CCII Based Capacitance Multipliers" in IEICE TRANSACTIONS on Fundamentals,
vol. E107-A, no. 1, pp. 114-118, January 2024, doi: 10.1587/transfun.2023KEL0001.
Abstract: In a field of biomedical engineering, not only low-pass filters for high frequency elimination but also notch filters for suppressing powerline interference are necessary to process low-frequency biosignals. For integration of low-frequency filters, chip implementation of large capacitances is major difficulty. As methods to enhance capacitances with small chip area, use of capacitance multipliers is effective. This letter describes design consideration of integrated low-frequency low-pass notch filter employing capacitance multipliers. Two main points are presented. Firstly, a new floating capacitance multiplier is proposed. Secondly, a technique to reduce the number of capacitance multipliers is proposed. By this technique, power consumption is reduced. The proposed techniques are applied a 3rd order low-pass notch filter. Simulation results show the effectiveness of the proposed techniques.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.2023KEL0001/_p
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@ARTICLE{e107-a_1_114,
author={Fujihiko MATSUMOTO, Hinano OHTSU, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Consideration of Integrated Low-Frequency Low-Pass Notch Filter Employing CCII Based Capacitance Multipliers},
year={2024},
volume={E107-A},
number={1},
pages={114-118},
abstract={In a field of biomedical engineering, not only low-pass filters for high frequency elimination but also notch filters for suppressing powerline interference are necessary to process low-frequency biosignals. For integration of low-frequency filters, chip implementation of large capacitances is major difficulty. As methods to enhance capacitances with small chip area, use of capacitance multipliers is effective. This letter describes design consideration of integrated low-frequency low-pass notch filter employing capacitance multipliers. Two main points are presented. Firstly, a new floating capacitance multiplier is proposed. Secondly, a technique to reduce the number of capacitance multipliers is proposed. By this technique, power consumption is reduced. The proposed techniques are applied a 3rd order low-pass notch filter. Simulation results show the effectiveness of the proposed techniques.},
keywords={},
doi={10.1587/transfun.2023KEL0001},
ISSN={1745-1337},
month={January},}
Copy
TY - JOUR
TI - Consideration of Integrated Low-Frequency Low-Pass Notch Filter Employing CCII Based Capacitance Multipliers
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 114
EP - 118
AU - Fujihiko MATSUMOTO
AU - Hinano OHTSU
PY - 2024
DO - 10.1587/transfun.2023KEL0001
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E107-A
IS - 1
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - January 2024
AB - In a field of biomedical engineering, not only low-pass filters for high frequency elimination but also notch filters for suppressing powerline interference are necessary to process low-frequency biosignals. For integration of low-frequency filters, chip implementation of large capacitances is major difficulty. As methods to enhance capacitances with small chip area, use of capacitance multipliers is effective. This letter describes design consideration of integrated low-frequency low-pass notch filter employing capacitance multipliers. Two main points are presented. Firstly, a new floating capacitance multiplier is proposed. Secondly, a technique to reduce the number of capacitance multipliers is proposed. By this technique, power consumption is reduced. The proposed techniques are applied a 3rd order low-pass notch filter. Simulation results show the effectiveness of the proposed techniques.
ER -
English
