Up to present, some automatically tunable active RC filters have been proposed for the monolithic integrated continuous-time filters. In this paper a synthesis method of monolithic active RC filters is presented, whose characteristic is hardly dependent on temperature, supply voltage and so on, theoretically. First, this paper describes a variable integrator controlled by bias current. Second, a resistor controlled current source circuit (RCCS) is also proposed, which contains the voltage controlled current source (VCCS) being identical with that used in the realization of the integrator and whose current is controlled by an external resistor. The use of this VCCS in the RCCS can completely compensate the variation of the integrator characteristics. Finally, these circuits are applied to realize a third-order elliptic low-pass filter, which is simulated on PSPICE. From the simulations, we obtain excellent results as follows: The deviation of gains in the passband due to the variation of temperature with a range of -10 to 60 is within 0.02 dB; A total harmonic distortion with a 1 Vp-p input voltage at 100 kHz is less than 0.4% when the cut-off frequency is 1 MHz and the supply voltage is 5 V.

High integration and low power operation of integrated circuits make noise sensitivity high. Therefore, it is important to reduce noise of circuits. A bias-offset transconductor is known as a linear transconductor. It is expected that noise sensitivity of the transconductor becomes higher due to improvement of linearity and reduction of power dissipation. This paper proposes a design method to reduce noise considering high linearity, reduction of power dissipation and small circuit size.

In this paper, a differential input/output linear MOS transconductor using an adaptively biasing technique is proposed. The proposed transconductor based on a differential pair is linearized by employing an adaptively biasing circuit. The linear characteristic of the individual differential output currents are obtained by introducing the adaptively biased currents to terminate the differential output terminals. Using the proposed technique, the common-mode rejection ration (CMRR) becomes high. Simulation results show that the proposed technique is effective for improvement of the linearity and other performances.

The Heart Rate Variability (HRV) analysis has become vigorous these days. One reason for this is that the HRV analysis investigates the dynamics of the autonomic nervous system activities which control the HRV. The Integral Pulse Frequency Modulation (IPFM) model is a pulse generating mechanism model in the nervous system, that is one of the models which connects the HRV to the autonomic nervous system activities. The IPFM model is a single frequency component model; however, the real HRV has multiple frequency components. Moreover, there are refractory periods after generating action potentials are initiated. Nevertheless, the IPFM model does not consider refractory periods. In order to make sure of the accuracy and the effectiveness of the integral function (IF) method applied to the real data, we consider the absolute refractory periods and two frequency components. In this investigation, the simulated HRV was made with a single and double frequency component using the IPFM model with and without absolute refractory periods. The original generating function of the IPFM model was demodulated by using the instantaneous heart rate tachogram. The power of the instantaneous pulse rate per minute was analyzed by the direct FFT method, the IF FFT method without the absolute refractory periods, and the IF FFT method with the absolute refractory periods. It was concluded that the IF FFT method can demodulate the original generating function accurately.

In transient analyzing of a crosstalk, the crosstalk waveform can be obtained with a commercial simulator such as SPICE simulation or FDTD (Finite Difference Time Domain) simulation. In case of using a simple model, a CMOS-IC load is considered as a constant capacitance load in crosstalk simulation. However, the semiconductor devices, such as CMOS-IC, have a characteristic of nonlinear impedance depending on the input voltage. We measured the far-end crosstalk of two parallel microstrip lines for a CMOS inverter (74HC04) load by changing the magnitude of the input step voltage. As the result, we found that the far-end crosstalk for the CMOS inverter load dose not necessarily depend on the input capacitance of the CMOS inverter.

In this paper, new linearization techniques for low-voltage bipolar OTAs using hyperbolic function circuits are described. First, a design of an exponential-law circuit, which is a basic building block to compose hyperbolic sine and hyperbolic cosine circuits, is proposed. This circuit is simpler than the conventional circuit and is suitable for low-voltage application. Next, two linearized OTAs using the hyperbolic function circuits are presented. The transconductance is given by maximally flat approximation. Although designs of the OTAs are different, the output currents are given by the same expression. Finally, performance of the OTAs is discussed. The linear input voltage range of the proposed OTAs is almost the same as that of the conventional OTA. However, one of the proposed OTA has no more than two-thirds the power dissipation of the conventional one. The other has a superior high-frequency characteristic.

Low-voltage technique for IC is getting one of the most important matters. It is quite difficult to realize a filter which can operate at 1 V or less because the base-emitter voltage of transistors can hardly be reduced. A design of a low-voltage continuous-time filter is presented in this paper. The basic building block of the filter is a pseudo-differential transconductor which has no tail current source. Therefore, the operating voltage is lower than that of an emitter-coupled pair. However, the common-mode (CM) gain of the transconductor is quite high and the CMRR is low. In order to reduce the CM gain, a CM feedback circuit is employed. The transconductance characteristic is expressed as the function of hyperbolic cosine. The designed filter is a fifth-order gyrator-C filter. The transconductor and the filter which has a fifth-order Butterworth lowpass characteristic are demonstrated by PSpice simulation. Transconductance characteristic, CMRR and stability of the transconductor are confirmed through the simulation. In the analysis of the filter, frequency response and offset voltage are examined. It is shown that the filter which has corner frequency of the order of megahertz can operate at a 1 V supply voltage.

This paper proposes design of new linear bipolar OTAs using hyperbolic circuits with an intermediate voltage terminal. Four types of the OTAs are presented; two OTAs contain a hyperbolic sine circuit and the other two OTAs employ a hyperbolic cosine circuit. The linear input voltage range of the proposed OTAs is wider than that of the well-known conventional OTA, multi-TANH doublet, while each proposed OTA has advantages, such as low power dissipation, high-frequency characteristics and so on. The results of SPICE simulation show that satisfactory characteristics are obtained.

A novel phase compensation technique for feedback integrators is proposed. By the technique, a zero is obtained without employing extra capacitors. A design of an integrator for IC using the proposed technique is presented. The frequency of the parasitic pole is proportional to the unity gain frequency. It is shown that excess-phase cancellation is obtained at any unity gain frequency.

Linearity of a transconductor with a theoretical linear characteristic is deteriorated by mobility degradation, in practice. In this paper, a technique to improve the linearity by combining a source-coupled pair with the transconductor is proposed. The proposed transconductor is the circuit that the deteriorated linearity of the conventional part is compensated by the transconductance characteristic of the source-coupled pair. In order to confirm the validity of the proposed technique, SPICE simulation is carried out. The transconductance change ratio of the proposed technique is about 1% and is 1/10 or less of the conventional circuit.

A new method to reduce power consumption of a linear transconductor is proposed in this paper. The minimum tail current for the operation of the transconductor is supplied by a new current source circuit. The proposed circuit is based on a dynamic biasing current technique. Results of SPICE simulation show that the proposed technique is very effective to reduce power consumption of the transconductor.

The transfer characteristic of an integrator is affected by excess-phase shift caused by the parasitic capacitance. The phase compensation is obtained by introducing zeros to generate phase lead. This paper proposes a phase compensation technique for the differential signal input integrator. The proposed technique is employing feedforward signal current source. The fifth-order leapfrog Chebyshev low-pass filter with 0.5 dB passband ripple is designed using the integrator with the proposed phase compensation. Further, an autotuning phase compensation system using the proposed technique is realized by applying a PLL system. The effectiveness of the proposed technique is confirmed by PSPICE simulation. The simulation results of the integrator with the proposed phase compensation shows that excess-phase cancellation is obtained at various unity gain frequencies. The accurate filter characteristic of the fifth-order leapfrog filter is obtained by using the autotuning phase compensation system. The passband of the filter is improved over wide range of frequencies. The proposed technique is suitable for low voltage application.

In a field of biomedical engineering, not only low-pass filters for high frequency elimination but also notch filters for suppressing powerline interference are necessary to process low-frequency biosignals. For integration of low-frequency filters, chip implementation of large capacitances is major difficulty. As methods to enhance capacitances with small chip area, use of capacitance multipliers is effective. This letter describes design consideration of integrated low-frequency low-pass notch filter employing capacitance multipliers. Two main points are presented. Firstly, a new floating capacitance multiplier is proposed. Secondly, a technique to reduce the number of capacitance multipliers is proposed. By this technique, power consumption is reduced. The proposed techniques are applied a 3rd order low-pass notch filter. Simulation results show the effectiveness of the proposed techniques.

According as the fine LSI process technique develops, the technique to reduce power dissipation of high-frequency integrated analog circuits is getting more important. This paper describes a design of high-frequency integrator with low power dissipation for monolithic leapfrog filters. In the design of the conventional monolithic integrators, there has been a great dfficulty that a high-frequency integrator which can operate at low supply voltage cannot be realized without additional circuits, such as unbalanced-to-balanced conversion circuits and common-mode feedback circuits. The proposed integrator is based on the Miller integrator. By a PNP current mirror circuit, high CMRR is realized. However, the high-frequency characteristic of the integrator is independent of PNP transistors. In addition, it can operate at low supply voltage. The excess phase shift of the integrator is compensated by insertion of the compensation capacitance. The effectiveness of the proposed technique is confirmed by PSPICE simulation. The simulation results of the integrator shows that the common-mode gain is efficiently low and the virtual ground is realized, and that moderate phase compensation can be achieved. The simulation results of the 3rd-order leapfrog filter using the integrator shows that the 50 MHz-cutoff frequency filter is obtained. Its power dissipation in operating 2 V-supply voltage is 5.22 mW.

A technique for realization of low-voltage OTAs is presented in this letter. A very low-voltage differential-output OTA is realized by employing a new common-mode amplifier in the common-mode feedback circuit. The results of PSpice simulations are shown. The proposed OTA can operate at a 0. 9 V supply voltage.

A new linearization technique of a transconductor is presented. The linearization is realized by using a differential current amplifier with an emitter-coupled pair. A specific value of the linearization parameter gives a maximally flat or an equiripple characteristic. Deviations from the theoretical characteristic can be adjusted by tuning the tail current of the emitter-coupled pair. The proposed technique is demonstrated by PSPICE simulation.