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Function Design for Minimum Multiple-Control Toffoli Circuits of Reversible Adder/Subtractor Blocks and Arithmetic Logic Units

Md Belayet ALI, Takashi HIRAYAMA, Katsuhisa YAMANAKA, Yasuaki NISHITANI

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Summary :

In this paper, we propose a design of reversible adder/subtractor blocks and arithmetic logic units (ALUs). The main concept of our approach is different from that of the existing related studies; we emphasize the function design. Our approach of investigating the reversible functions includes (a) the embedding of irreversible functions into incompletely-specified reversible functions, (b) the operation assignment, and (c) the permutation of function outputs. We give some extensions of these techniques for further improvements in the design of reversible functions. The resulting reversible circuits are smaller than that of the existing design in terms of the number of multiple-control Toffoli gates. To evaluate the quantum cost of the obtained circuits, we convert the circuits to reduced quantum circuits for experiments. The results also show the superiority of our realization of adder/subtractor blocks and ALUs in quantum cost.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E101-A No.12 pp.2231-2243
Publication Date
2018/12/01
Publicized
Online ISSN
1745-1337
DOI
10.1587/transfun.E101.A.2231
Type of Manuscript
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category

Authors

Md Belayet ALI
  Iwate University
Takashi HIRAYAMA
  Iwate University
Katsuhisa YAMANAKA
  Iwate University
Yasuaki NISHITANI
  Iwate University

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