Off-Chip Training with Additive Perturbation for FPGA-Based Hand Sign Recognition System

Hiroomi HIKAWA; Masayuki TAMAKI; Hidetaka ITO

doi:10.1587/transfun.E101.A.499

Off-Chip Training with Additive Perturbation for FPGA-Based Hand Sign Recognition System

Hiroomi HIKAWA, Masayuki TAMAKI, Hidetaka ITO

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An FPGA-based hardware hand sign recognition system was proposed in our previous work. The hand sign recognition system consisted of a preprocessing and a self-organizing map (SOM)-Hebb classifier. The training of the SOM-Hebb classifier was carried out by an off-chip computer using training vectors given by the system. The recognition performance was reportedly improved by adding perturbation to the training data. The perturbation was added manually during the process of image capture. This paper proposes a new off-chip training method with automatic performance improvement. To improve the system's recognition performance, the off-chip training system adds artificially generated perturbation to the training feature vectors. Advantage of the proposed method compared to additive scale perturbation to image is its low computational cost because the number of feature vector elements is much less than that of pixels contained in image. The feasibility of the proposed off-chip training was tested in simulations and experiments using American sign language (ASL). Simulation results showed that the proposed perturbation computation alters the feature vector so that it is same as the one obtained by a scaled image. Experimental results revealed that the proposed off-chip training improved the recognition accuracy from 78.9% to 94.3%.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E101-A No.2 pp.499-506

Publication Date: 2018/02/01

Publicized

Online ISSN: 1745-1337

DOI: 10.1587/transfun.E101.A.499

Type of Manuscript: PAPER

Category: Neural Networks and Bioengineering

Authors

Hiroomi HIKAWA
  Kansai University
Masayuki TAMAKI
  Daio Paper Corporation
Hidetaka ITO
  Kansai University

Keyword

hand sign recognition, self-organizing map, hardware, off-chip learning, perturbation

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Hiroomi HIKAWA, Masayuki TAMAKI, Hidetaka ITO, "Off-Chip Training with Additive Perturbation for FPGA-Based Hand Sign Recognition System" in IEICE TRANSACTIONS on Fundamentals, vol. E101-A, no. 2, pp. 499-506, February 2018, doi: 10.1587/transfun.E101.A.499.
Abstract: An FPGA-based hardware hand sign recognition system was proposed in our previous work. The hand sign recognition system consisted of a preprocessing and a self-organizing map (SOM)-Hebb classifier. The training of the SOM-Hebb classifier was carried out by an off-chip computer using training vectors given by the system. The recognition performance was reportedly improved by adding perturbation to the training data. The perturbation was added manually during the process of image capture. This paper proposes a new off-chip training method with automatic performance improvement. To improve the system's recognition performance, the off-chip training system adds artificially generated perturbation to the training feature vectors. Advantage of the proposed method compared to additive scale perturbation to image is its low computational cost because the number of feature vector elements is much less than that of pixels contained in image. The feasibility of the proposed off-chip training was tested in simulations and experiments using American sign language (ASL). Simulation results showed that the proposed perturbation computation alters the feature vector so that it is same as the one obtained by a scaled image. Experimental results revealed that the proposed off-chip training improved the recognition accuracy from 78.9% to 94.3%.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E101.A.499/_p

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@ARTICLE{e101-a_2_499,
author={Hiroomi HIKAWA, Masayuki TAMAKI, Hidetaka ITO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Off-Chip Training with Additive Perturbation for FPGA-Based Hand Sign Recognition System},
year={2018},
volume={E101-A},
number={2},
pages={499-506},
abstract={An FPGA-based hardware hand sign recognition system was proposed in our previous work. The hand sign recognition system consisted of a preprocessing and a self-organizing map (SOM)-Hebb classifier. The training of the SOM-Hebb classifier was carried out by an off-chip computer using training vectors given by the system. The recognition performance was reportedly improved by adding perturbation to the training data. The perturbation was added manually during the process of image capture. This paper proposes a new off-chip training method with automatic performance improvement. To improve the system's recognition performance, the off-chip training system adds artificially generated perturbation to the training feature vectors. Advantage of the proposed method compared to additive scale perturbation to image is its low computational cost because the number of feature vector elements is much less than that of pixels contained in image. The feasibility of the proposed off-chip training was tested in simulations and experiments using American sign language (ASL). Simulation results showed that the proposed perturbation computation alters the feature vector so that it is same as the one obtained by a scaled image. Experimental results revealed that the proposed off-chip training improved the recognition accuracy from 78.9% to 94.3%.},
keywords={},
doi={10.1587/transfun.E101.A.499},
ISSN={1745-1337},
month={February},}

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TY - JOUR
TI - Off-Chip Training with Additive Perturbation for FPGA-Based Hand Sign Recognition System
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 499
EP - 506
AU - Hiroomi HIKAWA
AU - Masayuki TAMAKI
AU - Hidetaka ITO
PY - 2018
DO - 10.1587/transfun.E101.A.499
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E101-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2018
AB - An FPGA-based hardware hand sign recognition system was proposed in our previous work. The hand sign recognition system consisted of a preprocessing and a self-organizing map (SOM)-Hebb classifier. The training of the SOM-Hebb classifier was carried out by an off-chip computer using training vectors given by the system. The recognition performance was reportedly improved by adding perturbation to the training data. The perturbation was added manually during the process of image capture. This paper proposes a new off-chip training method with automatic performance improvement. To improve the system's recognition performance, the off-chip training system adds artificially generated perturbation to the training feature vectors. Advantage of the proposed method compared to additive scale perturbation to image is its low computational cost because the number of feature vector elements is much less than that of pixels contained in image. The feasibility of the proposed off-chip training was tested in simulations and experiments using American sign language (ASL). Simulation results showed that the proposed perturbation computation alters the feature vector so that it is same as the one obtained by a scaled image. Experimental results revealed that the proposed off-chip training improved the recognition accuracy from 78.9% to 94.3%.
ER -