Hardware-Aware Sum-Product Decoding in the Decision Domain

Mizuki YAMADA; Keigo TAKEUCHI; Kiyoyuki KOIKE

doi:10.1587/transfun.E102.A.1980

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Hardware-Aware Sum-Product Decoding in the Decision Domain

Mizuki YAMADA, Keigo TAKEUCHI, Kiyoyuki KOIKE

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Summary :

We propose hardware-aware sum-product (SP) decoding for low-density parity-check codes. To simplify an implementation using a fixed-point number representation, we transform SP decoding in the logarithm domain to that in the decision domain. A polynomial approximation is proposed to implement an update rule of the proposed SP decoding efficiently. Numerical simulations show that the approximate SP decoding achieves almost the same performance as the exact SP decoding when an appropriate degree in the polynomial approximation is used, that it improves the convergence properties of SP and normalized min-sum decoding in the high signal-to-noise ratio regime, and that it is robust against quantization errors.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E102-A No.12 pp.1980-1987

Publication Date: 2019/12/01

Publicized

Online ISSN: 1745-1337

DOI: 10.1587/transfun.E102.A.1980

Type of Manuscript: PAPER

Category: Coding Theory

Authors

Mizuki YAMADA
  Toyohashi University of Technology
Keigo TAKEUCHI
  Toyohashi University of Technology
Kiyoyuki KOIKE
  Tokyo College

Keyword

low-density parity-check (LDPC) codes, sum-product (SP) decoding, hardware implementation, decision domain, polynomial approximation

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Mizuki YAMADA, Keigo TAKEUCHI, Kiyoyuki KOIKE, "Hardware-Aware Sum-Product Decoding in the Decision Domain" in IEICE TRANSACTIONS on Fundamentals, vol. E102-A, no. 12, pp. 1980-1987, December 2019, doi: 10.1587/transfun.E102.A.1980.
Abstract: We propose hardware-aware sum-product (SP) decoding for low-density parity-check codes. To simplify an implementation using a fixed-point number representation, we transform SP decoding in the logarithm domain to that in the decision domain. A polynomial approximation is proposed to implement an update rule of the proposed SP decoding efficiently. Numerical simulations show that the approximate SP decoding achieves almost the same performance as the exact SP decoding when an appropriate degree in the polynomial approximation is used, that it improves the convergence properties of SP and normalized min-sum decoding in the high signal-to-noise ratio regime, and that it is robust against quantization errors.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E102.A.1980/_p

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@ARTICLE{e102-a_12_1980,
author={Mizuki YAMADA, Keigo TAKEUCHI, Kiyoyuki KOIKE, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Hardware-Aware Sum-Product Decoding in the Decision Domain},
year={2019},
volume={E102-A},
number={12},
pages={1980-1987},
abstract={We propose hardware-aware sum-product (SP) decoding for low-density parity-check codes. To simplify an implementation using a fixed-point number representation, we transform SP decoding in the logarithm domain to that in the decision domain. A polynomial approximation is proposed to implement an update rule of the proposed SP decoding efficiently. Numerical simulations show that the approximate SP decoding achieves almost the same performance as the exact SP decoding when an appropriate degree in the polynomial approximation is used, that it improves the convergence properties of SP and normalized min-sum decoding in the high signal-to-noise ratio regime, and that it is robust against quantization errors.},
keywords={},
doi={10.1587/transfun.E102.A.1980},
ISSN={1745-1337},
month={December},}

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TY - JOUR
TI - Hardware-Aware Sum-Product Decoding in the Decision Domain
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1980
EP - 1987
AU - Mizuki YAMADA
AU - Keigo TAKEUCHI
AU - Kiyoyuki KOIKE
PY - 2019
DO - 10.1587/transfun.E102.A.1980
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E102-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2019
AB - We propose hardware-aware sum-product (SP) decoding for low-density parity-check codes. To simplify an implementation using a fixed-point number representation, we transform SP decoding in the logarithm domain to that in the decision domain. A polynomial approximation is proposed to implement an update rule of the proposed SP decoding efficiently. Numerical simulations show that the approximate SP decoding achieves almost the same performance as the exact SP decoding when an appropriate degree in the polynomial approximation is used, that it improves the convergence properties of SP and normalized min-sum decoding in the high signal-to-noise ratio regime, and that it is robust against quantization errors.
ER -