IEICE TRANSACTIONS on Fundamentals
Design and Modeling of a High Efficiency Step-Up/Step-Down DC-DC Converter with Smooth Transition
Summary :
This paper presents a step-up/step-down DC-DC converter with three operation modes to achieve high efficiency and small output ripple voltage. A constant time buck-boost mode, which is inserted between buck mode and boost mode, is proposed to achieve smooth transition. With the proposed mode, the output ripple voltage is significantly reduced when the input voltage is approximate to the output voltage. Besides, the novel control scheme minimizes the conduction loss by reducing the average inductor current and the switching loss by making the converter operate like a buck or boost converter. The small signal model of the step-up/step-down DC-DC converter is also derived to guide the compensation network design. The step-up/step-down converter is designed with a 0.5 µm CMOS n-well process, and can regulate an output voltage within the input voltage ranged from 2.5 V to 5.5 V with a maximum power efficiency of 96%. The simulation results show that the proposed converter exhibits an output ripple voltage of 28 mV in the transition mode.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E94-A No.2 pp.646-652
- Publication Date
- 2011/02/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E94.A.646
- Type of Manuscript
- Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
- Category
Authors
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Yanzhao MA, Hongyi WANG, Guican CHEN, "Design and Modeling of a High Efficiency Step-Up/Step-Down DC-DC Converter with Smooth Transition" in IEICE TRANSACTIONS on Fundamentals,
vol. E94-A, no. 2, pp. 646-652, February 2011, doi: 10.1587/transfun.E94.A.646.
Abstract: This paper presents a step-up/step-down DC-DC converter with three operation modes to achieve high efficiency and small output ripple voltage. A constant time buck-boost mode, which is inserted between buck mode and boost mode, is proposed to achieve smooth transition. With the proposed mode, the output ripple voltage is significantly reduced when the input voltage is approximate to the output voltage. Besides, the novel control scheme minimizes the conduction loss by reducing the average inductor current and the switching loss by making the converter operate like a buck or boost converter. The small signal model of the step-up/step-down DC-DC converter is also derived to guide the compensation network design. The step-up/step-down converter is designed with a 0.5 µm CMOS n-well process, and can regulate an output voltage within the input voltage ranged from 2.5 V to 5.5 V with a maximum power efficiency of 96%. The simulation results show that the proposed converter exhibits an output ripple voltage of 28 mV in the transition mode.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E94.A.646/_p
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@ARTICLE{e94-a_2_646,
author={Yanzhao MA, Hongyi WANG, Guican CHEN, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Design and Modeling of a High Efficiency Step-Up/Step-Down DC-DC Converter with Smooth Transition},
year={2011},
volume={E94-A},
number={2},
pages={646-652},
abstract={This paper presents a step-up/step-down DC-DC converter with three operation modes to achieve high efficiency and small output ripple voltage. A constant time buck-boost mode, which is inserted between buck mode and boost mode, is proposed to achieve smooth transition. With the proposed mode, the output ripple voltage is significantly reduced when the input voltage is approximate to the output voltage. Besides, the novel control scheme minimizes the conduction loss by reducing the average inductor current and the switching loss by making the converter operate like a buck or boost converter. The small signal model of the step-up/step-down DC-DC converter is also derived to guide the compensation network design. The step-up/step-down converter is designed with a 0.5 µm CMOS n-well process, and can regulate an output voltage within the input voltage ranged from 2.5 V to 5.5 V with a maximum power efficiency of 96%. The simulation results show that the proposed converter exhibits an output ripple voltage of 28 mV in the transition mode.},
keywords={},
doi={10.1587/transfun.E94.A.646},
ISSN={1745-1337},
month={February},}
Copy
TY - JOUR
TI - Design and Modeling of a High Efficiency Step-Up/Step-Down DC-DC Converter with Smooth Transition
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 646
EP - 652
AU - Yanzhao MA
AU - Hongyi WANG
AU - Guican CHEN
PY - 2011
DO - 10.1587/transfun.E94.A.646
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E94-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2011
AB - This paper presents a step-up/step-down DC-DC converter with three operation modes to achieve high efficiency and small output ripple voltage. A constant time buck-boost mode, which is inserted between buck mode and boost mode, is proposed to achieve smooth transition. With the proposed mode, the output ripple voltage is significantly reduced when the input voltage is approximate to the output voltage. Besides, the novel control scheme minimizes the conduction loss by reducing the average inductor current and the switching loss by making the converter operate like a buck or boost converter. The small signal model of the step-up/step-down DC-DC converter is also derived to guide the compensation network design. The step-up/step-down converter is designed with a 0.5 µm CMOS n-well process, and can regulate an output voltage within the input voltage ranged from 2.5 V to 5.5 V with a maximum power efficiency of 96%. The simulation results show that the proposed converter exhibits an output ripple voltage of 28 mV in the transition mode.
ER -
English
