This paper presents a model to estimate jitter insertion and accumulation in clock repeaters. We propose expressions to estimate, with low computational effort, both static and dynamic clock jitter insertion in repeaters with different sizes, interconnects and slew-rates. It requires only the pre-characterization of a reference repeater, which can be accomplished with a small number of simulations or measurements. Furthermore, we propose expressions for dynamic jitter accumulation that considers the dual nature of power and ground noise impact on delay. The complete model can be used to replace time-consuming transient noise simulations when evaluating jitter in clock distribution systems, and provide valuable insights regarding the impact of design parameters on jitter. Presented results show that our models can estimate jitter insertion and accumulation with an error within 10% of simulation results, for typical designs, and accurately reflect the impact of changing design parameters.
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Monica FIGUEIREDO, Rui L. AGUIAR, "A Jitter Insertion and Accumulation Model for Clock Repeaters" in IEICE TRANSACTIONS on Fundamentals,
vol. E95-A, no. 12, pp. 2430-2442, December 2012, doi: 10.1587/transfun.E95.A.2430.
Abstract: This paper presents a model to estimate jitter insertion and accumulation in clock repeaters. We propose expressions to estimate, with low computational effort, both static and dynamic clock jitter insertion in repeaters with different sizes, interconnects and slew-rates. It requires only the pre-characterization of a reference repeater, which can be accomplished with a small number of simulations or measurements. Furthermore, we propose expressions for dynamic jitter accumulation that considers the dual nature of power and ground noise impact on delay. The complete model can be used to replace time-consuming transient noise simulations when evaluating jitter in clock distribution systems, and provide valuable insights regarding the impact of design parameters on jitter. Presented results show that our models can estimate jitter insertion and accumulation with an error within 10% of simulation results, for typical designs, and accurately reflect the impact of changing design parameters.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E95.A.2430/_p
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@ARTICLE{e95-a_12_2430,
author={Monica FIGUEIREDO, Rui L. AGUIAR, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Jitter Insertion and Accumulation Model for Clock Repeaters},
year={2012},
volume={E95-A},
number={12},
pages={2430-2442},
abstract={This paper presents a model to estimate jitter insertion and accumulation in clock repeaters. We propose expressions to estimate, with low computational effort, both static and dynamic clock jitter insertion in repeaters with different sizes, interconnects and slew-rates. It requires only the pre-characterization of a reference repeater, which can be accomplished with a small number of simulations or measurements. Furthermore, we propose expressions for dynamic jitter accumulation that considers the dual nature of power and ground noise impact on delay. The complete model can be used to replace time-consuming transient noise simulations when evaluating jitter in clock distribution systems, and provide valuable insights regarding the impact of design parameters on jitter. Presented results show that our models can estimate jitter insertion and accumulation with an error within 10% of simulation results, for typical designs, and accurately reflect the impact of changing design parameters.},
keywords={},
doi={10.1587/transfun.E95.A.2430},
ISSN={1745-1337},
month={December},}
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TY - JOUR
TI - A Jitter Insertion and Accumulation Model for Clock Repeaters
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2430
EP - 2442
AU - Monica FIGUEIREDO
AU - Rui L. AGUIAR
PY - 2012
DO - 10.1587/transfun.E95.A.2430
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E95-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2012
AB - This paper presents a model to estimate jitter insertion and accumulation in clock repeaters. We propose expressions to estimate, with low computational effort, both static and dynamic clock jitter insertion in repeaters with different sizes, interconnects and slew-rates. It requires only the pre-characterization of a reference repeater, which can be accomplished with a small number of simulations or measurements. Furthermore, we propose expressions for dynamic jitter accumulation that considers the dual nature of power and ground noise impact on delay. The complete model can be used to replace time-consuming transient noise simulations when evaluating jitter in clock distribution systems, and provide valuable insights regarding the impact of design parameters on jitter. Presented results show that our models can estimate jitter insertion and accumulation with an error within 10% of simulation results, for typical designs, and accurately reflect the impact of changing design parameters.
ER -