IEICE TRANSACTIONS on Fundamentals
Low Complexity Logarithmic and Anti-Logarithmic Converters for Hybrid Number System Processors and DSP Applications
Summary :
This paper presents an efficient approach for logarithmic and anti-logarithmic converters which can be used in the arithmetic unit of hybrid number system processors and logarithm/exponent function generators in DSP applications. By employing the novel quasi-symmetrical difference method with only the simple shift-add logic and the look-up table, the proposed approach can reduce the hardware area and improve the conversion speed significantly while achieve similar accuracy compared with the previous methods. The implementation results in both FPGA and 0.18-µm CMOS technology are also presented and discussed.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E96-A No.2 pp.584-590
- Publication Date
- 2013/02/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E96.A.584
- Type of Manuscript
- PAPER
- Category
- Digital Signal Processing
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Keyword
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Van-Phuc HOANG, Cong-Kha PHAM, "Low Complexity Logarithmic and Anti-Logarithmic Converters for Hybrid Number System Processors and DSP Applications" in IEICE TRANSACTIONS on Fundamentals,
vol. E96-A, no. 2, pp. 584-590, February 2013, doi: 10.1587/transfun.E96.A.584.
Abstract: This paper presents an efficient approach for logarithmic and anti-logarithmic converters which can be used in the arithmetic unit of hybrid number system processors and logarithm/exponent function generators in DSP applications. By employing the novel quasi-symmetrical difference method with only the simple shift-add logic and the look-up table, the proposed approach can reduce the hardware area and improve the conversion speed significantly while achieve similar accuracy compared with the previous methods. The implementation results in both FPGA and 0.18-µm CMOS technology are also presented and discussed.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E96.A.584/_p
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@ARTICLE{e96-a_2_584,
author={Van-Phuc HOANG, Cong-Kha PHAM, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Low Complexity Logarithmic and Anti-Logarithmic Converters for Hybrid Number System Processors and DSP Applications},
year={2013},
volume={E96-A},
number={2},
pages={584-590},
abstract={This paper presents an efficient approach for logarithmic and anti-logarithmic converters which can be used in the arithmetic unit of hybrid number system processors and logarithm/exponent function generators in DSP applications. By employing the novel quasi-symmetrical difference method with only the simple shift-add logic and the look-up table, the proposed approach can reduce the hardware area and improve the conversion speed significantly while achieve similar accuracy compared with the previous methods. The implementation results in both FPGA and 0.18-µm CMOS technology are also presented and discussed.},
keywords={},
doi={10.1587/transfun.E96.A.584},
ISSN={1745-1337},
month={February},}
Copy
TY - JOUR
TI - Low Complexity Logarithmic and Anti-Logarithmic Converters for Hybrid Number System Processors and DSP Applications
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 584
EP - 590
AU - Van-Phuc HOANG
AU - Cong-Kha PHAM
PY - 2013
DO - 10.1587/transfun.E96.A.584
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E96-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2013
AB - This paper presents an efficient approach for logarithmic and anti-logarithmic converters which can be used in the arithmetic unit of hybrid number system processors and logarithm/exponent function generators in DSP applications. By employing the novel quasi-symmetrical difference method with only the simple shift-add logic and the look-up table, the proposed approach can reduce the hardware area and improve the conversion speed significantly while achieve similar accuracy compared with the previous methods. The implementation results in both FPGA and 0.18-µm CMOS technology are also presented and discussed.
ER -
English
