IEICE TRANSACTIONS on Fundamentals
A Method of Analog IC Placement with Common Centroid Constraints
Summary :
To improve immunity against process gradients, a common centroid constraint, in which every pair of capacitors should be placed symmetrically with respect to a common center point, is widely used. The pair of capacitors are derived by dividing some original capacitors into two halves. Xiao et al. proposed a method to obtain a placement which satisfies the common centroid constraints, but this method has a defect. In this paper, we propose a decoding algorithm to obtain a placement which satisfies common centroid constraints.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E97-A No.1 pp.339-346
- Publication Date
- 2014/01/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E97.A.339
- Type of Manuscript
- PAPER
- Category
- VLSI Design Technology and CAD
Authors
Keitaro UE
Tokyo University of Agriculture and Technology
Kunihiro FUJIYOSHI
Tokyo University of Agriculture and Technology
Keyword
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Keitaro UE, Kunihiro FUJIYOSHI, "A Method of Analog IC Placement with Common Centroid Constraints" in IEICE TRANSACTIONS on Fundamentals,
vol. E97-A, no. 1, pp. 339-346, January 2014, doi: 10.1587/transfun.E97.A.339.
Abstract: To improve immunity against process gradients, a common centroid constraint, in which every pair of capacitors should be placed symmetrically with respect to a common center point, is widely used. The pair of capacitors are derived by dividing some original capacitors into two halves. Xiao et al. proposed a method to obtain a placement which satisfies the common centroid constraints, but this method has a defect. In this paper, we propose a decoding algorithm to obtain a placement which satisfies common centroid constraints.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E97.A.339/_p
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@ARTICLE{e97-a_1_339,
author={Keitaro UE, Kunihiro FUJIYOSHI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Method of Analog IC Placement with Common Centroid Constraints},
year={2014},
volume={E97-A},
number={1},
pages={339-346},
abstract={To improve immunity against process gradients, a common centroid constraint, in which every pair of capacitors should be placed symmetrically with respect to a common center point, is widely used. The pair of capacitors are derived by dividing some original capacitors into two halves. Xiao et al. proposed a method to obtain a placement which satisfies the common centroid constraints, but this method has a defect. In this paper, we propose a decoding algorithm to obtain a placement which satisfies common centroid constraints.},
keywords={},
doi={10.1587/transfun.E97.A.339},
ISSN={1745-1337},
month={January},}
Copy
TY - JOUR
TI - A Method of Analog IC Placement with Common Centroid Constraints
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 339
EP - 346
AU - Keitaro UE
AU - Kunihiro FUJIYOSHI
PY - 2014
DO - 10.1587/transfun.E97.A.339
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E97-A
IS - 1
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - January 2014
AB - To improve immunity against process gradients, a common centroid constraint, in which every pair of capacitors should be placed symmetrically with respect to a common center point, is widely used. The pair of capacitors are derived by dividing some original capacitors into two halves. Xiao et al. proposed a method to obtain a placement which satisfies the common centroid constraints, but this method has a defect. In this paper, we propose a decoding algorithm to obtain a placement which satisfies common centroid constraints.
ER -
English
