IEICE TRANSACTIONS on Fundamentals
Reconfigurable Circuit Design Based on Arithmetic Logic Unit Using Double-Gate CNTFETs
Summary :
This letter describes a design methodology for an arithmetic logic unit (ALU) incorporating reconfigurability based on double-gate carbon nanotube field-effect transistors (DG-CNTFETs). The design of a DG-CNTFET with an ambipolar-property-based reconfigurable static logic circuit is simple and straightforward using an ambipolar binary decision diagram (Am-BDD), which represents the cornerstone for the automatic pass transistor logic (PTL) synthesis flows of ambipolar devices. In this work, an ALU with 16 functions is synthesized by the design methodology of a DG-CNTFET-based reconfigurable static logic circuit. Furthermore, it is shown that the proposed ALU is much more flexible and practical than a conventional DG-CNTFET-based reconfigurable ALU.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E97-A No.2 pp.675-678
- Publication Date
- 2014/02/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E97.A.675
- Type of Manuscript
- LETTER
- Category
- VLSI Design Technology and CAD
Authors
Hiroshi NINOMIYA
Shonan Institute of Technology
Manabu KOBAYASHI
Shonan Institute of Technology
Yasuyuki MIURA
Shonan Institute of Technology
Shigeyoshi WATANABE
Shonan Institute of Technology
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Hiroshi NINOMIYA, Manabu KOBAYASHI, Yasuyuki MIURA, Shigeyoshi WATANABE, "Reconfigurable Circuit Design Based on Arithmetic Logic Unit Using Double-Gate CNTFETs" in IEICE TRANSACTIONS on Fundamentals,
vol. E97-A, no. 2, pp. 675-678, February 2014, doi: 10.1587/transfun.E97.A.675.
Abstract: This letter describes a design methodology for an arithmetic logic unit (ALU) incorporating reconfigurability based on double-gate carbon nanotube field-effect transistors (DG-CNTFETs). The design of a DG-CNTFET with an ambipolar-property-based reconfigurable static logic circuit is simple and straightforward using an ambipolar binary decision diagram (Am-BDD), which represents the cornerstone for the automatic pass transistor logic (PTL) synthesis flows of ambipolar devices. In this work, an ALU with 16 functions is synthesized by the design methodology of a DG-CNTFET-based reconfigurable static logic circuit. Furthermore, it is shown that the proposed ALU is much more flexible and practical than a conventional DG-CNTFET-based reconfigurable ALU.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E97.A.675/_p
Copy
@ARTICLE{e97-a_2_675,
author={Hiroshi NINOMIYA, Manabu KOBAYASHI, Yasuyuki MIURA, Shigeyoshi WATANABE, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Reconfigurable Circuit Design Based on Arithmetic Logic Unit Using Double-Gate CNTFETs},
year={2014},
volume={E97-A},
number={2},
pages={675-678},
abstract={This letter describes a design methodology for an arithmetic logic unit (ALU) incorporating reconfigurability based on double-gate carbon nanotube field-effect transistors (DG-CNTFETs). The design of a DG-CNTFET with an ambipolar-property-based reconfigurable static logic circuit is simple and straightforward using an ambipolar binary decision diagram (Am-BDD), which represents the cornerstone for the automatic pass transistor logic (PTL) synthesis flows of ambipolar devices. In this work, an ALU with 16 functions is synthesized by the design methodology of a DG-CNTFET-based reconfigurable static logic circuit. Furthermore, it is shown that the proposed ALU is much more flexible and practical than a conventional DG-CNTFET-based reconfigurable ALU.},
keywords={},
doi={10.1587/transfun.E97.A.675},
ISSN={1745-1337},
month={February},}
Copy
TY - JOUR
TI - Reconfigurable Circuit Design Based on Arithmetic Logic Unit Using Double-Gate CNTFETs
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 675
EP - 678
AU - Hiroshi NINOMIYA
AU - Manabu KOBAYASHI
AU - Yasuyuki MIURA
AU - Shigeyoshi WATANABE
PY - 2014
DO - 10.1587/transfun.E97.A.675
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E97-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2014
AB - This letter describes a design methodology for an arithmetic logic unit (ALU) incorporating reconfigurability based on double-gate carbon nanotube field-effect transistors (DG-CNTFETs). The design of a DG-CNTFET with an ambipolar-property-based reconfigurable static logic circuit is simple and straightforward using an ambipolar binary decision diagram (Am-BDD), which represents the cornerstone for the automatic pass transistor logic (PTL) synthesis flows of ambipolar devices. In this work, an ALU with 16 functions is synthesized by the design methodology of a DG-CNTFET-based reconfigurable static logic circuit. Furthermore, it is shown that the proposed ALU is much more flexible and practical than a conventional DG-CNTFET-based reconfigurable ALU.
ER -
English
