IEICE TRANSACTIONS on Fundamentals
Leakage Power Aware Scheduling in High-Level Synthesis
Summary :
In this paper, we address the problem of scheduling operations into control steps with a dual threshold voltage (dual-Vth) technique, under timing and resource constraints. We present a two-stage algorithm for leakage power optimization. In the threshold voltage (Vth) assignment stage, the proposed algorithm first initializes all the operations to high-Vth, and then it iteratively shortens the critical path delay by reassigning the set of operations covering all the critical paths to low-Vth until the timing constraint is met. In the scheduling stage, a modified force-directed scheduling is implemented to schedule operations and to adjust threshold voltage assignments with a consideration of the resource constraints. To eliminate the potential resource constraint violations, the operations' threshold voltage adjustment problem is formulated as a “weighted interval scheduling” problem. The experimental results show that our proposed method performs better in both running time and leakage power reduction compared with MWIS [3].
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E97-A No.4 pp.940-951
- Publication Date
- 2014/04/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E97.A.940
- Type of Manuscript
- PAPER
- Category
- VLSI Design Technology and CAD
Authors
Nan WANG
Waseda University
Song CHEN
University of Science and Technology of China
Cong HAO
Shanghai Jiaotong University
Haoran ZHANG
Waseda University
Takeshi YOSHIMURA
Waseda University
Keyword
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Nan WANG, Song CHEN, Cong HAO, Haoran ZHANG, Takeshi YOSHIMURA, "Leakage Power Aware Scheduling in High-Level Synthesis" in IEICE TRANSACTIONS on Fundamentals,
vol. E97-A, no. 4, pp. 940-951, April 2014, doi: 10.1587/transfun.E97.A.940.
Abstract: In this paper, we address the problem of scheduling operations into control steps with a dual threshold voltage (dual-Vth) technique, under timing and resource constraints. We present a two-stage algorithm for leakage power optimization. In the threshold voltage (Vth) assignment stage, the proposed algorithm first initializes all the operations to high-Vth, and then it iteratively shortens the critical path delay by reassigning the set of operations covering all the critical paths to low-Vth until the timing constraint is met. In the scheduling stage, a modified force-directed scheduling is implemented to schedule operations and to adjust threshold voltage assignments with a consideration of the resource constraints. To eliminate the potential resource constraint violations, the operations' threshold voltage adjustment problem is formulated as a “weighted interval scheduling” problem. The experimental results show that our proposed method performs better in both running time and leakage power reduction compared with MWIS [3].
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E97.A.940/_p
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@ARTICLE{e97-a_4_940,
author={Nan WANG, Song CHEN, Cong HAO, Haoran ZHANG, Takeshi YOSHIMURA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Leakage Power Aware Scheduling in High-Level Synthesis},
year={2014},
volume={E97-A},
number={4},
pages={940-951},
abstract={In this paper, we address the problem of scheduling operations into control steps with a dual threshold voltage (dual-Vth) technique, under timing and resource constraints. We present a two-stage algorithm for leakage power optimization. In the threshold voltage (Vth) assignment stage, the proposed algorithm first initializes all the operations to high-Vth, and then it iteratively shortens the critical path delay by reassigning the set of operations covering all the critical paths to low-Vth until the timing constraint is met. In the scheduling stage, a modified force-directed scheduling is implemented to schedule operations and to adjust threshold voltage assignments with a consideration of the resource constraints. To eliminate the potential resource constraint violations, the operations' threshold voltage adjustment problem is formulated as a “weighted interval scheduling” problem. The experimental results show that our proposed method performs better in both running time and leakage power reduction compared with MWIS [3].},
keywords={},
doi={10.1587/transfun.E97.A.940},
ISSN={1745-1337},
month={April},}
Copy
TY - JOUR
TI - Leakage Power Aware Scheduling in High-Level Synthesis
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 940
EP - 951
AU - Nan WANG
AU - Song CHEN
AU - Cong HAO
AU - Haoran ZHANG
AU - Takeshi YOSHIMURA
PY - 2014
DO - 10.1587/transfun.E97.A.940
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E97-A
IS - 4
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - April 2014
AB - In this paper, we address the problem of scheduling operations into control steps with a dual threshold voltage (dual-Vth) technique, under timing and resource constraints. We present a two-stage algorithm for leakage power optimization. In the threshold voltage (Vth) assignment stage, the proposed algorithm first initializes all the operations to high-Vth, and then it iteratively shortens the critical path delay by reassigning the set of operations covering all the critical paths to low-Vth until the timing constraint is met. In the scheduling stage, a modified force-directed scheduling is implemented to schedule operations and to adjust threshold voltage assignments with a consideration of the resource constraints. To eliminate the potential resource constraint violations, the operations' threshold voltage adjustment problem is formulated as a “weighted interval scheduling” problem. The experimental results show that our proposed method performs better in both running time and leakage power reduction compared with MWIS [3].
ER -
English
