With the development of digital TV system, how to display the NTSC signal in digital TV system is a problem. De-interlacing is an algorithm to solve it. In previous papers, using motion compensation (MC) method for de-interlacing needs lots of computation complexity and it is not easy to implement in hardware. In this paper, a content adaptive de-interlacing algorithm is proposed. Our algorithm is based on the motion adaptive (MA) method which combines the advantages of intra-field and inter-field method. We propose a block type decision mechanism to predict the video content instead of a blind processing with MC method throughout the entire frame. Additionally, in intra-field method, we propose the edge-base adaptive weight average (EAWA) method to achieve a better performance and smooth the edge and stripe. In order to demonstrate our algorithm, we implement the de-interlacing system on the DSP platform with thorough complexity analysis. Compared to MC method, we not only achieve higher video quality in objective and subjective view, but also consume lower computation power. From the profiling on CPU run-time analysis, the proposed algorithm is only one-fifth of MC method. At the DSP demonstration board, the saving ratio is about 54% to 96%.
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copy
Tsung-Han TSAI, Hsueh-Liang LIN, "Platform-Based Design for the Low Complexity and High Performance De-Interlacing System" in IEICE TRANSACTIONS on Information,
vol. E91-D, no. 12, pp. 2784-2792, December 2008, doi: 10.1093/ietisy/e91-d.12.2784.
Abstract: With the development of digital TV system, how to display the NTSC signal in digital TV system is a problem. De-interlacing is an algorithm to solve it. In previous papers, using motion compensation (MC) method for de-interlacing needs lots of computation complexity and it is not easy to implement in hardware. In this paper, a content adaptive de-interlacing algorithm is proposed. Our algorithm is based on the motion adaptive (MA) method which combines the advantages of intra-field and inter-field method. We propose a block type decision mechanism to predict the video content instead of a blind processing with MC method throughout the entire frame. Additionally, in intra-field method, we propose the edge-base adaptive weight average (EAWA) method to achieve a better performance and smooth the edge and stripe. In order to demonstrate our algorithm, we implement the de-interlacing system on the DSP platform with thorough complexity analysis. Compared to MC method, we not only achieve higher video quality in objective and subjective view, but also consume lower computation power. From the profiling on CPU run-time analysis, the proposed algorithm is only one-fifth of MC method. At the DSP demonstration board, the saving ratio is about 54% to 96%.
URL: https://global.ieice.org/en_transactions/information/10.1093/ietisy/e91-d.12.2784/_p
Copy
@ARTICLE{e91-d_12_2784,
author={Tsung-Han TSAI, Hsueh-Liang LIN, },
journal={IEICE TRANSACTIONS on Information},
title={Platform-Based Design for the Low Complexity and High Performance De-Interlacing System},
year={2008},
volume={E91-D},
number={12},
pages={2784-2792},
abstract={With the development of digital TV system, how to display the NTSC signal in digital TV system is a problem. De-interlacing is an algorithm to solve it. In previous papers, using motion compensation (MC) method for de-interlacing needs lots of computation complexity and it is not easy to implement in hardware. In this paper, a content adaptive de-interlacing algorithm is proposed. Our algorithm is based on the motion adaptive (MA) method which combines the advantages of intra-field and inter-field method. We propose a block type decision mechanism to predict the video content instead of a blind processing with MC method throughout the entire frame. Additionally, in intra-field method, we propose the edge-base adaptive weight average (EAWA) method to achieve a better performance and smooth the edge and stripe. In order to demonstrate our algorithm, we implement the de-interlacing system on the DSP platform with thorough complexity analysis. Compared to MC method, we not only achieve higher video quality in objective and subjective view, but also consume lower computation power. From the profiling on CPU run-time analysis, the proposed algorithm is only one-fifth of MC method. At the DSP demonstration board, the saving ratio is about 54% to 96%.},
keywords={},
doi={10.1093/ietisy/e91-d.12.2784},
ISSN={1745-1361},
month={December},}
Copy
TY - JOUR
TI - Platform-Based Design for the Low Complexity and High Performance De-Interlacing System
T2 - IEICE TRANSACTIONS on Information
SP - 2784
EP - 2792
AU - Tsung-Han TSAI
AU - Hsueh-Liang LIN
PY - 2008
DO - 10.1093/ietisy/e91-d.12.2784
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E91-D
IS - 12
JA - IEICE TRANSACTIONS on Information
Y1 - December 2008
AB - With the development of digital TV system, how to display the NTSC signal in digital TV system is a problem. De-interlacing is an algorithm to solve it. In previous papers, using motion compensation (MC) method for de-interlacing needs lots of computation complexity and it is not easy to implement in hardware. In this paper, a content adaptive de-interlacing algorithm is proposed. Our algorithm is based on the motion adaptive (MA) method which combines the advantages of intra-field and inter-field method. We propose a block type decision mechanism to predict the video content instead of a blind processing with MC method throughout the entire frame. Additionally, in intra-field method, we propose the edge-base adaptive weight average (EAWA) method to achieve a better performance and smooth the edge and stripe. In order to demonstrate our algorithm, we implement the de-interlacing system on the DSP platform with thorough complexity analysis. Compared to MC method, we not only achieve higher video quality in objective and subjective view, but also consume lower computation power. From the profiling on CPU run-time analysis, the proposed algorithm is only one-fifth of MC method. At the DSP demonstration board, the saving ratio is about 54% to 96%.
ER -