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A Sub-Logarithmic Time Sorting Algorithm on a Reconfigurable Array

Koji NAKANO, Toshimitsu MASUZAWA, Nobuki TOKURA

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Summary :

A bus system whose configuration can be dynamically changed is called a reconfigurable bus system. A reconfigurable array consists of processors arranged to a 2-dimensional grid with a reconfigurable bus system. We present a parallel algorithm which sorts N elements in O (T) time on a reconfigurable array with NN log(T) N processors for every Tlog*N.

Publication
IEICE TRANSACTIONS on Information Vol.E74-D No.11 pp.3894-3901
Publication Date
1991/11/25
Publicized
Online ISSN
DOI
Type of Manuscript
PAPER
Category
Algorithm and Computational Complexity

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