Implementing Neural Architectures Using CMOS Current-Mode VLSI Circuits

Zheng TANG; Okihiko ISHIZUKA; Hiroki MATSUMOTO

Implementing Neural Architectures Using CMOS Current-Mode VLSI Circuits

Zheng TANG, Okihiko ISHIZUKA, Hiroki MATSUMOTO

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We introduce a novel neural network with a trigonometric interconnection called the T-Model neural network in this paper. A VLSI implementation of the T-Model neural network based on CMOS current-mode circuits is also presented. The circuit is completely compatible with standard VLSI technology. A set of neuron-type elements of CMOS current-mode circuits is described and a very large scale neural network is also synthesized. The feasibility and the operation principle of the synthesis of the T-Model neural network using CMOS current-mode circuits are demonstrated and confirmed by experimental results of fabricated CMOS VLSI neural chips.

Publication: IEICE TRANSACTIONS on Information Vol.E74-D No.5 pp.1329-1336

Publication Date: 1991/05/25

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Type of Manuscript: PAPER

Category: Computer Hardware and Design

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Zheng TANG
Okihiko ISHIZUKA
Hiroki MATSUMOTO

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Zheng TANG, Okihiko ISHIZUKA, Hiroki MATSUMOTO, "Implementing Neural Architectures Using CMOS Current-Mode VLSI Circuits" in IEICE TRANSACTIONS on Information, vol. E74-D, no. 5, pp. 1329-1336, May 1991, doi: .
Abstract: We introduce a novel neural network with a trigonometric interconnection called the T-Model neural network in this paper. A VLSI implementation of the T-Model neural network based on CMOS current-mode circuits is also presented. The circuit is completely compatible with standard VLSI technology. A set of neuron-type elements of CMOS current-mode circuits is described and a very large scale neural network is also synthesized. The feasibility and the operation principle of the synthesis of the T-Model neural network using CMOS current-mode circuits are demonstrated and confirmed by experimental results of fabricated CMOS VLSI neural chips.
URL: https://global.ieice.org/en_transactions/information/10.1587/e74-d_5_1329/_p

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@ARTICLE{e74-d_5_1329,
author={Zheng TANG, Okihiko ISHIZUKA, Hiroki MATSUMOTO, },
journal={IEICE TRANSACTIONS on Information},
title={Implementing Neural Architectures Using CMOS Current-Mode VLSI Circuits},
year={1991},
volume={E74-D},
number={5},
pages={1329-1336},
abstract={We introduce a novel neural network with a trigonometric interconnection called the T-Model neural network in this paper. A VLSI implementation of the T-Model neural network based on CMOS current-mode circuits is also presented. The circuit is completely compatible with standard VLSI technology. A set of neuron-type elements of CMOS current-mode circuits is described and a very large scale neural network is also synthesized. The feasibility and the operation principle of the synthesis of the T-Model neural network using CMOS current-mode circuits are demonstrated and confirmed by experimental results of fabricated CMOS VLSI neural chips.},
keywords={},
doi={},
ISSN={},
month={May},}

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TY - JOUR
TI - Implementing Neural Architectures Using CMOS Current-Mode VLSI Circuits
T2 - IEICE TRANSACTIONS on Information
SP - 1329
EP - 1336
AU - Zheng TANG
AU - Okihiko ISHIZUKA
AU - Hiroki MATSUMOTO
PY - 1991
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E74-D
IS - 5
JA - IEICE TRANSACTIONS on Information
Y1 - May 1991
AB - We introduce a novel neural network with a trigonometric interconnection called the T-Model neural network in this paper. A VLSI implementation of the T-Model neural network based on CMOS current-mode circuits is also presented. The circuit is completely compatible with standard VLSI technology. A set of neuron-type elements of CMOS current-mode circuits is described and a very large scale neural network is also synthesized. The feasibility and the operation principle of the synthesis of the T-Model neural network using CMOS current-mode circuits are demonstrated and confirmed by experimental results of fabricated CMOS VLSI neural chips.
ER -