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A Language for Designing Module Generators

Vasily G. MOSHNYAGA, Keikichi TAMARU, Hiroto YASUURA

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Summary :

A new applicative design language is proposed for developing generators of data-path modules from hardware algorithms. The language includes a set of primitives that represent placement operations, parameterized cells, routing patterns and a set of transformation rules specifying modifications of the module topology without changing its functionality. Using the language, a hardware algorithm designer can easily define both the topological and geometrical specifications of module generation directly at the functional level without engaged in the layout details. A sketch of the language and an example of module design with the language is presented.

Publication
IEICE TRANSACTIONS on Information Vol.E76-D No.9 pp.1066-1074
Publication Date
1993/09/25
Publicized
Online ISSN
DOI
Type of Manuscript
Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design)
Category
Hardware Design Languages

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