IEICE TRANSACTIONS on Information
Testing for the Programming Circuit of SRAM-Based FPGAs
Summary :
The programming circuit of SRAM-based FPGAs consists of two shift registers, a control circuit and a configuration memory (SRAM) cell array. Because the configuration memory cell array can be easily tested by conventional test methods for RAMs, we focus on testing for the shift registers. We first derive test procedures for the shift registers, which can be done by using only the faculties of the programming circuit, without using additional hardware. Next, we show the validness of the test procedures. Finally, we show an application of the test procedures to test Xilinx XC4025.
- Publication
- IEICE TRANSACTIONS on Information Vol.E82-D No.6 pp.1051-1057
- Publication Date
- 1999/06/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Fault Tolerant Computing
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Hiroyuki MICHINISHI, Tokumi YOKOHIRA, Takuji OKAMOTO, Tomoo INOUE, Hideo FUJIWARA, "Testing for the Programming Circuit of SRAM-Based FPGAs" in IEICE TRANSACTIONS on Information,
vol. E82-D, no. 6, pp. 1051-1057, June 1999, doi: .
Abstract: The programming circuit of SRAM-based FPGAs consists of two shift registers, a control circuit and a configuration memory (SRAM) cell array. Because the configuration memory cell array can be easily tested by conventional test methods for RAMs, we focus on testing for the shift registers. We first derive test procedures for the shift registers, which can be done by using only the faculties of the programming circuit, without using additional hardware. Next, we show the validness of the test procedures. Finally, we show an application of the test procedures to test Xilinx XC4025.
URL: https://global.ieice.org/en_transactions/information/10.1587/e82-d_6_1051/_p
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@ARTICLE{e82-d_6_1051,
author={Hiroyuki MICHINISHI, Tokumi YOKOHIRA, Takuji OKAMOTO, Tomoo INOUE, Hideo FUJIWARA, },
journal={IEICE TRANSACTIONS on Information},
title={Testing for the Programming Circuit of SRAM-Based FPGAs},
year={1999},
volume={E82-D},
number={6},
pages={1051-1057},
abstract={The programming circuit of SRAM-based FPGAs consists of two shift registers, a control circuit and a configuration memory (SRAM) cell array. Because the configuration memory cell array can be easily tested by conventional test methods for RAMs, we focus on testing for the shift registers. We first derive test procedures for the shift registers, which can be done by using only the faculties of the programming circuit, without using additional hardware. Next, we show the validness of the test procedures. Finally, we show an application of the test procedures to test Xilinx XC4025.},
keywords={},
doi={},
ISSN={},
month={June},}
Copy
TY - JOUR
TI - Testing for the Programming Circuit of SRAM-Based FPGAs
T2 - IEICE TRANSACTIONS on Information
SP - 1051
EP - 1057
AU - Hiroyuki MICHINISHI
AU - Tokumi YOKOHIRA
AU - Takuji OKAMOTO
AU - Tomoo INOUE
AU - Hideo FUJIWARA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E82-D
IS - 6
JA - IEICE TRANSACTIONS on Information
Y1 - June 1999
AB - The programming circuit of SRAM-based FPGAs consists of two shift registers, a control circuit and a configuration memory (SRAM) cell array. Because the configuration memory cell array can be easily tested by conventional test methods for RAMs, we focus on testing for the shift registers. We first derive test procedures for the shift registers, which can be done by using only the faculties of the programming circuit, without using additional hardware. Next, we show the validness of the test procedures. Finally, we show an application of the test procedures to test Xilinx XC4025.
ER -
English
