Software TLB Management for Embedded Systems
Summary :
The virtual memory functions in real-time operating systems have been used in embedded systems. Recent RISC processors provide virtual memory supports through software-managed Translation Lookaside Buffer (TLB) in software. In real-time aspects of the embedded systems, managing TLB entries is the most important because overhead at TLB miss time gives a great effect to overall performance of the system. In this paper, we propose several TLB management algorithms in MIPS processors. In the algorithms, a replaced TLB entry is randomly chosen or managed. We analyze the algorithms by comparing overheads at task switching times and TLB miss times.
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- IEICE TRANSACTIONS on Information Vol.E86-D No.10 pp.2034-2039
- Publication Date
- 2003/10/01
- Publicized
- Online ISSN
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- Type of Manuscript
- Special Section LETTER (Special Issue on Development of Advanced Computer Systems)
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Yukikazu NAKAMOTO, "Software TLB Management for Embedded Systems" in IEICE TRANSACTIONS on Information,
vol. E86-D, no. 10, pp. 2034-2039, October 2003, doi: .
Abstract: The virtual memory functions in real-time operating systems have been used in embedded systems. Recent RISC processors provide virtual memory supports through software-managed Translation Lookaside Buffer (TLB) in software. In real-time aspects of the embedded systems, managing TLB entries is the most important because overhead at TLB miss time gives a great effect to overall performance of the system. In this paper, we propose several TLB management algorithms in MIPS processors. In the algorithms, a replaced TLB entry is randomly chosen or managed. We analyze the algorithms by comparing overheads at task switching times and TLB miss times.
URL: https://global.ieice.org/en_transactions/information/10.1587/e86-d_10_2034/_p
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@ARTICLE{e86-d_10_2034,
author={Yukikazu NAKAMOTO, },
journal={IEICE TRANSACTIONS on Information},
title={Software TLB Management for Embedded Systems},
year={2003},
volume={E86-D},
number={10},
pages={2034-2039},
abstract={The virtual memory functions in real-time operating systems have been used in embedded systems. Recent RISC processors provide virtual memory supports through software-managed Translation Lookaside Buffer (TLB) in software. In real-time aspects of the embedded systems, managing TLB entries is the most important because overhead at TLB miss time gives a great effect to overall performance of the system. In this paper, we propose several TLB management algorithms in MIPS processors. In the algorithms, a replaced TLB entry is randomly chosen or managed. We analyze the algorithms by comparing overheads at task switching times and TLB miss times.},
keywords={},
doi={},
ISSN={},
month={October},}
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TY - JOUR
TI - Software TLB Management for Embedded Systems
T2 - IEICE TRANSACTIONS on Information
SP - 2034
EP - 2039
AU - Yukikazu NAKAMOTO
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E86-D
IS - 10
JA - IEICE TRANSACTIONS on Information
Y1 - October 2003
AB - The virtual memory functions in real-time operating systems have been used in embedded systems. Recent RISC processors provide virtual memory supports through software-managed Translation Lookaside Buffer (TLB) in software. In real-time aspects of the embedded systems, managing TLB entries is the most important because overhead at TLB miss time gives a great effect to overall performance of the system. In this paper, we propose several TLB management algorithms in MIPS processors. In the algorithms, a replaced TLB entry is randomly chosen or managed. We analyze the algorithms by comparing overheads at task switching times and TLB miss times.
ER -
English
