An Efficiently Self-Reconstructing Array System Using E-1<eq200110.gif>-Track Switches

Tadayoshi HORITA; Itsuo TAKANAMI

An Efficiently Self-Reconstructing Array System Using E-1-Track Switches

Tadayoshi HORITA, Itsuo TAKANAMI

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The E-1-track switch torus array model and the "EAR" reconfiguration method are proposed for fault tolerance of mesh or torus-connected processor arrays, where the original idea of EAR is in EAM. The comparison among these and others is described in terms of the (run-time) array reliability, hardware overhead, and/or reconfiguration time. When a designer chooses one among fault tolerant methods, he should consider their features synthetically case by case, and we consider that the results given by this paper are useful for the choice.

Publication: IEICE TRANSACTIONS on Information Vol.E86-D No.12 pp.2743-2752

Publication Date: 2003/12/01

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Type of Manuscript: PAPER

Category: Fault Tolerance

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Tadayoshi HORITA, Itsuo TAKANAMI, "An Efficiently Self-Reconstructing Array System Using E-1-Track Switches" in IEICE TRANSACTIONS on Information, vol. E86-D, no. 12, pp. 2743-2752, December 2003, doi: .
Abstract: The E-1-track switch torus array model and the "EAR" reconfiguration method are proposed for fault tolerance of mesh or torus-connected processor arrays, where the original idea of EAR is in EAM. The comparison among these and others is described in terms of the (run-time) array reliability, hardware overhead, and/or reconfiguration time. When a designer chooses one among fault tolerant methods, he should consider their features synthetically case by case, and we consider that the results given by this paper are useful for the choice.
URL: https://global.ieice.org/en_transactions/information/10.1587/e86-d_12_2743/_p

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@ARTICLE{e86-d_12_2743,
author={Tadayoshi HORITA, Itsuo TAKANAMI, },
journal={IEICE TRANSACTIONS on Information},
title={An Efficiently Self-Reconstructing Array System Using E-1-Track Switches},
year={2003},
volume={E86-D},
number={12},
pages={2743-2752},
abstract={The E-1-track switch torus array model and the "EAR" reconfiguration method are proposed for fault tolerance of mesh or torus-connected processor arrays, where the original idea of EAR is in EAM. The comparison among these and others is described in terms of the (run-time) array reliability, hardware overhead, and/or reconfiguration time. When a designer chooses one among fault tolerant methods, he should consider their features synthetically case by case, and we consider that the results given by this paper are useful for the choice.},
keywords={},
doi={},
ISSN={},
month={December},}

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TY - JOUR
TI - An Efficiently Self-Reconstructing Array System Using E-1-Track Switches
T2 - IEICE TRANSACTIONS on Information
SP - 2743
EP - 2752
AU - Tadayoshi HORITA
AU - Itsuo TAKANAMI
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E86-D
IS - 12
JA - IEICE TRANSACTIONS on Information
Y1 - December 2003
AB - The E-1-track switch torus array model and the "EAR" reconfiguration method are proposed for fault tolerance of mesh or torus-connected processor arrays, where the original idea of EAR is in EAM. The comparison among these and others is described in terms of the (run-time) array reliability, hardware overhead, and/or reconfiguration time. When a designer chooses one among fault tolerant methods, he should consider their features synthetically case by case, and we consider that the results given by this paper are useful for the choice.
ER -