IEICE TRANSACTIONS on Information
Performance Evaluation of an Alternative IP Lookup Scheme for Implementing High-Speed Routers
Summary :
The most important function of a router is to perform IP lookup that determines the output ports of incoming IP packets by their destination addresses. Hence, IP lookup is one of the main issues in implementing high-speed routers. The IP lookup algorithm implemented in IQ2200 Chipset with two-level table architecture can efficiently use memory. However, it wastes processor resource for full re-construction of the forwarding tables whenever every route insertion/deletion is requested. In order to improve the utilization of processor resource, we propose an IP lookup algorithm with three-level table architecture for high-speed routers. We evaluate the performance of the proposed algorithm in terms of the memory size required for storing lookup information and the number of memory access in constructing forwarding tables. Being compared with the IQ2200 scheme, the proposed scheme can reduce the number of memory access up to 99% even though it needs about 16% more memory.
- Publication
- IEICE TRANSACTIONS on Information Vol.E87-D No.12 pp.2764-2772
- Publication Date
- 2004/12/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Networks
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Min Young CHUNG, Jaehyung PARK, Jeong Ho KIM, Byung Jun AHN, "Performance Evaluation of an Alternative IP Lookup Scheme for Implementing High-Speed Routers" in IEICE TRANSACTIONS on Information,
vol. E87-D, no. 12, pp. 2764-2772, December 2004, doi: .
Abstract: The most important function of a router is to perform IP lookup that determines the output ports of incoming IP packets by their destination addresses. Hence, IP lookup is one of the main issues in implementing high-speed routers. The IP lookup algorithm implemented in IQ2200 Chipset with two-level table architecture can efficiently use memory. However, it wastes processor resource for full re-construction of the forwarding tables whenever every route insertion/deletion is requested. In order to improve the utilization of processor resource, we propose an IP lookup algorithm with three-level table architecture for high-speed routers. We evaluate the performance of the proposed algorithm in terms of the memory size required for storing lookup information and the number of memory access in constructing forwarding tables. Being compared with the IQ2200 scheme, the proposed scheme can reduce the number of memory access up to 99% even though it needs about 16% more memory.
URL: https://global.ieice.org/en_transactions/information/10.1587/e87-d_12_2764/_p
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@ARTICLE{e87-d_12_2764,
author={Min Young CHUNG, Jaehyung PARK, Jeong Ho KIM, Byung Jun AHN, },
journal={IEICE TRANSACTIONS on Information},
title={Performance Evaluation of an Alternative IP Lookup Scheme for Implementing High-Speed Routers},
year={2004},
volume={E87-D},
number={12},
pages={2764-2772},
abstract={The most important function of a router is to perform IP lookup that determines the output ports of incoming IP packets by their destination addresses. Hence, IP lookup is one of the main issues in implementing high-speed routers. The IP lookup algorithm implemented in IQ2200 Chipset with two-level table architecture can efficiently use memory. However, it wastes processor resource for full re-construction of the forwarding tables whenever every route insertion/deletion is requested. In order to improve the utilization of processor resource, we propose an IP lookup algorithm with three-level table architecture for high-speed routers. We evaluate the performance of the proposed algorithm in terms of the memory size required for storing lookup information and the number of memory access in constructing forwarding tables. Being compared with the IQ2200 scheme, the proposed scheme can reduce the number of memory access up to 99% even though it needs about 16% more memory.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - Performance Evaluation of an Alternative IP Lookup Scheme for Implementing High-Speed Routers
T2 - IEICE TRANSACTIONS on Information
SP - 2764
EP - 2772
AU - Min Young CHUNG
AU - Jaehyung PARK
AU - Jeong Ho KIM
AU - Byung Jun AHN
PY - 2004
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E87-D
IS - 12
JA - IEICE TRANSACTIONS on Information
Y1 - December 2004
AB - The most important function of a router is to perform IP lookup that determines the output ports of incoming IP packets by their destination addresses. Hence, IP lookup is one of the main issues in implementing high-speed routers. The IP lookup algorithm implemented in IQ2200 Chipset with two-level table architecture can efficiently use memory. However, it wastes processor resource for full re-construction of the forwarding tables whenever every route insertion/deletion is requested. In order to improve the utilization of processor resource, we propose an IP lookup algorithm with three-level table architecture for high-speed routers. We evaluate the performance of the proposed algorithm in terms of the memory size required for storing lookup information and the number of memory access in constructing forwarding tables. Being compared with the IQ2200 scheme, the proposed scheme can reduce the number of memory access up to 99% even though it needs about 16% more memory.
ER -
English
