IEICE TRANSACTIONS on Information
ILP Based Multithreaded Code Generation for Simulink Model
Summary :
The increasing complexity of embedded applications and the prevalence of multiprocessor system-on-chip (MPSoC) introduce a great challenge for designers on how to achieve performance and programmability simultaneously in embedded systems. Automatic multithreaded code generation methods taking account of performance optimization techniques can be an effective solution. In this paper, we consider the issue of increasing processor utilization and reducing communication cost during multithreaded code generation from Simulink models to improve system performance. We propose a combination of three-layered multithreaded software with Integer Linear Programming (ILP) based design-time mapping and scheduling policies to get optimal performance. The hierarchical software with a thread layer increases processor usage, while the mapping and scheduling policies formulate a group of integer linear programming formulations to minimize communication cost as well as to maximize performance. Experimental results demonstrate the advantages of the proposed techniques on performance improvements.
- Publication
- IEICE TRANSACTIONS on Information Vol.E97-D No.12 pp.3072-3082
- Publication Date
- 2014/12/01
- Publicized
- Online ISSN
- 1745-1361
- DOI
- 10.1587/transinf.2014PAP0015
- Type of Manuscript
- Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
- Category
- Architecture
Authors
Kai HUANG
Zhejiang University
Min YU
Zhejiang University
Xiaomeng ZHANG
Zhejiang University
Dandan ZHENG
Zhejiang University
Siwen XIU
Zhejiang University
Rongjie YAN
Institute of Software Chinese Academy of Sciences
Kai HUANG
Technical University of Munich
Zhili LIU
Hangzhou C-SKY Co. Ltd
Xiaolang YAN
Zhejiang University
Keyword
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Kai HUANG, Min YU, Xiaomeng ZHANG, Dandan ZHENG, Siwen XIU, Rongjie YAN, Kai HUANG, Zhili LIU, Xiaolang YAN, "ILP Based Multithreaded Code Generation for Simulink Model" in IEICE TRANSACTIONS on Information,
vol. E97-D, no. 12, pp. 3072-3082, December 2014, doi: 10.1587/transinf.2014PAP0015.
Abstract: The increasing complexity of embedded applications and the prevalence of multiprocessor system-on-chip (MPSoC) introduce a great challenge for designers on how to achieve performance and programmability simultaneously in embedded systems. Automatic multithreaded code generation methods taking account of performance optimization techniques can be an effective solution. In this paper, we consider the issue of increasing processor utilization and reducing communication cost during multithreaded code generation from Simulink models to improve system performance. We propose a combination of three-layered multithreaded software with Integer Linear Programming (ILP) based design-time mapping and scheduling policies to get optimal performance. The hierarchical software with a thread layer increases processor usage, while the mapping and scheduling policies formulate a group of integer linear programming formulations to minimize communication cost as well as to maximize performance. Experimental results demonstrate the advantages of the proposed techniques on performance improvements.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.2014PAP0015/_p
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@ARTICLE{e97-d_12_3072,
author={Kai HUANG, Min YU, Xiaomeng ZHANG, Dandan ZHENG, Siwen XIU, Rongjie YAN, Kai HUANG, Zhili LIU, Xiaolang YAN, },
journal={IEICE TRANSACTIONS on Information},
title={ILP Based Multithreaded Code Generation for Simulink Model},
year={2014},
volume={E97-D},
number={12},
pages={3072-3082},
abstract={The increasing complexity of embedded applications and the prevalence of multiprocessor system-on-chip (MPSoC) introduce a great challenge for designers on how to achieve performance and programmability simultaneously in embedded systems. Automatic multithreaded code generation methods taking account of performance optimization techniques can be an effective solution. In this paper, we consider the issue of increasing processor utilization and reducing communication cost during multithreaded code generation from Simulink models to improve system performance. We propose a combination of three-layered multithreaded software with Integer Linear Programming (ILP) based design-time mapping and scheduling policies to get optimal performance. The hierarchical software with a thread layer increases processor usage, while the mapping and scheduling policies formulate a group of integer linear programming formulations to minimize communication cost as well as to maximize performance. Experimental results demonstrate the advantages of the proposed techniques on performance improvements.},
keywords={},
doi={10.1587/transinf.2014PAP0015},
ISSN={1745-1361},
month={December},}
Copy
TY - JOUR
TI - ILP Based Multithreaded Code Generation for Simulink Model
T2 - IEICE TRANSACTIONS on Information
SP - 3072
EP - 3082
AU - Kai HUANG
AU - Min YU
AU - Xiaomeng ZHANG
AU - Dandan ZHENG
AU - Siwen XIU
AU - Rongjie YAN
AU - Kai HUANG
AU - Zhili LIU
AU - Xiaolang YAN
PY - 2014
DO - 10.1587/transinf.2014PAP0015
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E97-D
IS - 12
JA - IEICE TRANSACTIONS on Information
Y1 - December 2014
AB - The increasing complexity of embedded applications and the prevalence of multiprocessor system-on-chip (MPSoC) introduce a great challenge for designers on how to achieve performance and programmability simultaneously in embedded systems. Automatic multithreaded code generation methods taking account of performance optimization techniques can be an effective solution. In this paper, we consider the issue of increasing processor utilization and reducing communication cost during multithreaded code generation from Simulink models to improve system performance. We propose a combination of three-layered multithreaded software with Integer Linear Programming (ILP) based design-time mapping and scheduling policies to get optimal performance. The hierarchical software with a thread layer increases processor usage, while the mapping and scheduling policies formulate a group of integer linear programming formulations to minimize communication cost as well as to maximize performance. Experimental results demonstrate the advantages of the proposed techniques on performance improvements.
ER -
English
