IEICE TRANSACTIONS on Information
Battery-Aware Loop Nests Mapping for CGRAs
Summary :
Coarse-grained Reconfigurable Architecture (CGRA) is a promising mobile computing platform that provides both high performance and high energy efficiency. In an application, loop nests are usually mapped onto CGRA for further acceleration, so optimizing the mapping is an important goal for design of CGRAs. Moreover, obviously almost all of mobile devices are powered by batteries, how to reduce energy consumption also becomes one of primary concerns in using CGRAs. This paper makes three contributions: a) Proposing an energy consumption model for CGRA; b) Formulating loop nests mapping problem to minimize the battery charge loss; c) Extract an efficient heuristic algorithm called BPMap. Experiment results on most kernels of the benchmarks and real-life applications show that our methods can improve the performance of the kernels and lower the energy consumption.
- Publication
- IEICE TRANSACTIONS on Information Vol.E98-D No.2 pp.230-242
- Publication Date
- 2015/02/01
- Publicized
- Online ISSN
- 1745-1361
- DOI
- 10.1587/transinf.2014RCP0003
- Type of Manuscript
- Special Section PAPER (Special Section on Reconfigurable Systems)
- Category
- Architecture
Authors
Yu PENG
Tsinghua University
Shouyi YIN
Tsinghua University
Leibo LIU
Tsinghua University
Shaojun WEI
Tsinghua University
Keyword
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Yu PENG, Shouyi YIN, Leibo LIU, Shaojun WEI, "Battery-Aware Loop Nests Mapping for CGRAs" in IEICE TRANSACTIONS on Information,
vol. E98-D, no. 2, pp. 230-242, February 2015, doi: 10.1587/transinf.2014RCP0003.
Abstract: Coarse-grained Reconfigurable Architecture (CGRA) is a promising mobile computing platform that provides both high performance and high energy efficiency. In an application, loop nests are usually mapped onto CGRA for further acceleration, so optimizing the mapping is an important goal for design of CGRAs. Moreover, obviously almost all of mobile devices are powered by batteries, how to reduce energy consumption also becomes one of primary concerns in using CGRAs. This paper makes three contributions: a) Proposing an energy consumption model for CGRA; b) Formulating loop nests mapping problem to minimize the battery charge loss; c) Extract an efficient heuristic algorithm called BPMap. Experiment results on most kernels of the benchmarks and real-life applications show that our methods can improve the performance of the kernels and lower the energy consumption.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.2014RCP0003/_p
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@ARTICLE{e98-d_2_230,
author={Yu PENG, Shouyi YIN, Leibo LIU, Shaojun WEI, },
journal={IEICE TRANSACTIONS on Information},
title={Battery-Aware Loop Nests Mapping for CGRAs},
year={2015},
volume={E98-D},
number={2},
pages={230-242},
abstract={Coarse-grained Reconfigurable Architecture (CGRA) is a promising mobile computing platform that provides both high performance and high energy efficiency. In an application, loop nests are usually mapped onto CGRA for further acceleration, so optimizing the mapping is an important goal for design of CGRAs. Moreover, obviously almost all of mobile devices are powered by batteries, how to reduce energy consumption also becomes one of primary concerns in using CGRAs. This paper makes three contributions: a) Proposing an energy consumption model for CGRA; b) Formulating loop nests mapping problem to minimize the battery charge loss; c) Extract an efficient heuristic algorithm called BPMap. Experiment results on most kernels of the benchmarks and real-life applications show that our methods can improve the performance of the kernels and lower the energy consumption.},
keywords={},
doi={10.1587/transinf.2014RCP0003},
ISSN={1745-1361},
month={February},}
Copy
TY - JOUR
TI - Battery-Aware Loop Nests Mapping for CGRAs
T2 - IEICE TRANSACTIONS on Information
SP - 230
EP - 242
AU - Yu PENG
AU - Shouyi YIN
AU - Leibo LIU
AU - Shaojun WEI
PY - 2015
DO - 10.1587/transinf.2014RCP0003
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E98-D
IS - 2
JA - IEICE TRANSACTIONS on Information
Y1 - February 2015
AB - Coarse-grained Reconfigurable Architecture (CGRA) is a promising mobile computing platform that provides both high performance and high energy efficiency. In an application, loop nests are usually mapped onto CGRA for further acceleration, so optimizing the mapping is an important goal for design of CGRAs. Moreover, obviously almost all of mobile devices are powered by batteries, how to reduce energy consumption also becomes one of primary concerns in using CGRAs. This paper makes three contributions: a) Proposing an energy consumption model for CGRA; b) Formulating loop nests mapping problem to minimize the battery charge loss; c) Extract an efficient heuristic algorithm called BPMap. Experiment results on most kernels of the benchmarks and real-life applications show that our methods can improve the performance of the kernels and lower the energy consumption.
ER -
English
