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IEICE TRANSACTIONS on Information

A Data-Centric Directive-Based Framework to Accelerate Out-of-Core Stencil Computation on a GPU

Jingcheng SHEN, Fumihiko INO, Albert FARRÉS, Mauricio HANZICH

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Summary :

Graphics processing units (GPUs) are highly efficient architectures for parallel stencil code; however, the small device (i.e., GPU) memory capacity (several tens of GBs) necessitates the use of out-of-core computation to process excess data. Great programming effort is needed to manually implement efficient out-of-core stencil code. To relieve such programming burdens, directive-based frameworks emerged, such as the pipelined accelerator (PACC); however, they usually lack specific optimizations to reduce data transfer. In this paper, we extend PACC with two data-centric optimizations to address data transfer problems. The first is a direct-mapping scheme that eliminates host (i.e., CPU) buffers, which intermediate between the original data and device buffers. The second is a region-sharing scheme that significantly reduces host-to-device data transfer. The extended PACC was applied to an acoustic wave propagator, automatically extending the length of original serial code 2.3-fold to obtain the out-of-core code. Experimental results revealed that on a Tesla V100 GPU, the generated code ran 41.0, 22.1, and 3.6 times as fast as implementations based on Open Multi-Processing (OpenMP), Unified Memory, and the previous PACC, respectively. The generated code also demonstrated usefulness with small datasets that fit in the device capacity, running 1.3 times as fast as an in-core implementation.

Publication
IEICE TRANSACTIONS on Information Vol.E103-D No.12 pp.2421-2434
Publication Date
2020/12/01
Publicized
2020/09/07
Online ISSN
1745-1361
DOI
10.1587/transinf.2020PAP0014
Type of Manuscript
Special Section PAPER (Special Section on Parallel, Distributed, and Reconfigurable Computing, and Networking)
Category
Fundamentals of Information Systems

Authors

Jingcheng SHEN
  Osaka University
Fumihiko INO
  Osaka University
Albert FARRÉS
  Barcelona Supercomputing Center
Mauricio HANZICH
  Barcelona Supercomputing Center

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