Parallel Parity Checksum and Syndrome Generation for Digital Video and Audio Transmission over Cable Channel
Summary :
The ITU-T J.83 Annex B is a widely adopted standard in North America for digital video and audio transmission over coaxial cable. This paper proposes a new parallel processing architecture of the parity checksum generator and syndrome generator specified in the standard for packet synchronization and error detection. The proposed parallel processing architecture removes the performance bottleneck occurring in the conventional serial processing architecture, leading to significant decrease in processing time for generating a parity checksum in transmitter and a syndrome in receiver. Implementation results show that the proposed parallel processing architecture reduces the processing time by 92% for parity checksum generation and by 81% for syndrome generation over the conventional serial processing architecture.
- Publication
- IEICE TRANSACTIONS on Information Vol.E92-D No.7 pp.1435-1441
- Publication Date
- 2009/07/01
- Publicized
- Online ISSN
- 1745-1361
- DOI
- 10.1587/transinf.E92.D.1435
- Type of Manuscript
- PAPER
- Category
- Image Processing and Video Processing
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Eonpyo HONG, Eungu JUNG, Junhee HONG, Jaewon YIM, Dongsoo HAR, "Parallel Parity Checksum and Syndrome Generation for Digital Video and Audio Transmission over Cable Channel" in IEICE TRANSACTIONS on Information,
vol. E92-D, no. 7, pp. 1435-1441, July 2009, doi: 10.1587/transinf.E92.D.1435.
Abstract: The ITU-T J.83 Annex B is a widely adopted standard in North America for digital video and audio transmission over coaxial cable. This paper proposes a new parallel processing architecture of the parity checksum generator and syndrome generator specified in the standard for packet synchronization and error detection. The proposed parallel processing architecture removes the performance bottleneck occurring in the conventional serial processing architecture, leading to significant decrease in processing time for generating a parity checksum in transmitter and a syndrome in receiver. Implementation results show that the proposed parallel processing architecture reduces the processing time by 92% for parity checksum generation and by 81% for syndrome generation over the conventional serial processing architecture.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.E92.D.1435/_p
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@ARTICLE{e92-d_7_1435,
author={Eonpyo HONG, Eungu JUNG, Junhee HONG, Jaewon YIM, Dongsoo HAR, },
journal={IEICE TRANSACTIONS on Information},
title={Parallel Parity Checksum and Syndrome Generation for Digital Video and Audio Transmission over Cable Channel},
year={2009},
volume={E92-D},
number={7},
pages={1435-1441},
abstract={The ITU-T J.83 Annex B is a widely adopted standard in North America for digital video and audio transmission over coaxial cable. This paper proposes a new parallel processing architecture of the parity checksum generator and syndrome generator specified in the standard for packet synchronization and error detection. The proposed parallel processing architecture removes the performance bottleneck occurring in the conventional serial processing architecture, leading to significant decrease in processing time for generating a parity checksum in transmitter and a syndrome in receiver. Implementation results show that the proposed parallel processing architecture reduces the processing time by 92% for parity checksum generation and by 81% for syndrome generation over the conventional serial processing architecture.},
keywords={},
doi={10.1587/transinf.E92.D.1435},
ISSN={1745-1361},
month={July},}
Copy
TY - JOUR
TI - Parallel Parity Checksum and Syndrome Generation for Digital Video and Audio Transmission over Cable Channel
T2 - IEICE TRANSACTIONS on Information
SP - 1435
EP - 1441
AU - Eonpyo HONG
AU - Eungu JUNG
AU - Junhee HONG
AU - Jaewon YIM
AU - Dongsoo HAR
PY - 2009
DO - 10.1587/transinf.E92.D.1435
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E92-D
IS - 7
JA - IEICE TRANSACTIONS on Information
Y1 - July 2009
AB - The ITU-T J.83 Annex B is a widely adopted standard in North America for digital video and audio transmission over coaxial cable. This paper proposes a new parallel processing architecture of the parity checksum generator and syndrome generator specified in the standard for packet synchronization and error detection. The proposed parallel processing architecture removes the performance bottleneck occurring in the conventional serial processing architecture, leading to significant decrease in processing time for generating a parity checksum in transmitter and a syndrome in receiver. Implementation results show that the proposed parallel processing architecture reduces the processing time by 92% for parity checksum generation and by 81% for syndrome generation over the conventional serial processing architecture.
ER -
English
