Code density is often a critical issue in embedded computers, since the memory size of embedded systems is strictly limited. Echo instructions have been proposed as a method for reducing code size. This paper presents a new type of echo instruction, split echo, and evaluates an implementation of both split echo and traditional echo instructions on a MIPS R3000 based processor. Evaluation results show that memory requirement is reduced by 12% on average with small additional hardware cost.
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Iver STUBDAL, Arda KARADUMAN, Hideharu AMANO, "Code Compression with Split Echo Instructions" in IEICE TRANSACTIONS on Information,
vol. E92-D, no. 9, pp. 1650-1656, September 2009, doi: 10.1587/transinf.E92.D.1650.
Abstract: Code density is often a critical issue in embedded computers, since the memory size of embedded systems is strictly limited. Echo instructions have been proposed as a method for reducing code size. This paper presents a new type of echo instruction, split echo, and evaluates an implementation of both split echo and traditional echo instructions on a MIPS R3000 based processor. Evaluation results show that memory requirement is reduced by 12% on average with small additional hardware cost.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.E92.D.1650/_p
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@ARTICLE{e92-d_9_1650,
author={Iver STUBDAL, Arda KARADUMAN, Hideharu AMANO, },
journal={IEICE TRANSACTIONS on Information},
title={Code Compression with Split Echo Instructions},
year={2009},
volume={E92-D},
number={9},
pages={1650-1656},
abstract={Code density is often a critical issue in embedded computers, since the memory size of embedded systems is strictly limited. Echo instructions have been proposed as a method for reducing code size. This paper presents a new type of echo instruction, split echo, and evaluates an implementation of both split echo and traditional echo instructions on a MIPS R3000 based processor. Evaluation results show that memory requirement is reduced by 12% on average with small additional hardware cost.},
keywords={},
doi={10.1587/transinf.E92.D.1650},
ISSN={1745-1361},
month={September},}
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TY - JOUR
TI - Code Compression with Split Echo Instructions
T2 - IEICE TRANSACTIONS on Information
SP - 1650
EP - 1656
AU - Iver STUBDAL
AU - Arda KARADUMAN
AU - Hideharu AMANO
PY - 2009
DO - 10.1587/transinf.E92.D.1650
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E92-D
IS - 9
JA - IEICE TRANSACTIONS on Information
Y1 - September 2009
AB - Code density is often a critical issue in embedded computers, since the memory size of embedded systems is strictly limited. Echo instructions have been proposed as a method for reducing code size. This paper presents a new type of echo instruction, split echo, and evaluates an implementation of both split echo and traditional echo instructions on a MIPS R3000 based processor. Evaluation results show that memory requirement is reduced by 12% on average with small additional hardware cost.
ER -