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IEICE TRANSACTIONS on Information

A Parallel Branching Program Machine for Sequential Circuits: Implementation and Evaluation

Hiroki NAKAHARA, Tsutomu SASAO, Munehiro MATSUURA, Yoshifumi KAWAMURA

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Summary :

The parallel branching program machine (PBM128) consists of 128 branching program machines (BMs) and a programmable interconnection. To represent logic functions on BMs, we use quaternary decision diagrams. To evaluate functions, we use 3-address quaternary branch instructions. We realized many benchmark functions on the PBM128, and compared its memory size, computation time, and power consumption with the Intel's Core2Duo microprocessor. The PBM128 requires approximately a quarter of the memory for the Core2Duo, and is 21.4-96.1 times faster than the Core2Duo. It dissipates a quarter of the power of the Core2Duo. Also, we realized packet filters such as an access controller and a firewall, and compared their performance with software on the Core2Duo. For these packet filters, the PBM128 requires approximately 17% of the memory for the Core2Duo, and is 21.3-23.7 times faster than the Core2Duo.

Publication
IEICE TRANSACTIONS on Information Vol.E93-D No.8 pp.2048-2058
Publication Date
2010/08/01
Publicized
Online ISSN
1745-1361
DOI
10.1587/transinf.E93.D.2048
Type of Manuscript
Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category
Logic Design

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